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authorBen Dooks <ben.dooks@codethink.co.uk>2016-06-21 11:20:24 +0100
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>2016-06-21 13:25:58 +0200
commit458ad21df1c38d229aaa4c494199168d742302ab (patch)
tree738f776820ef323c479a9741cbb70a16dee07b2a /arch/arm/mach-exynos/platsmp.c
parentf4c24f36c3e457cb727f9f548f146d805739e8e0 (diff)
ARM: EXYNOS: Fixups for big-endian operation
If the kernel is built big endian, then using the __raw read and write IO accessors is not going to work as they end up writing big-endian data to little-endian IO registers. Fix this by using the readl and writel relaxed versions which ensure little endian IO. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/platsmp.c')
-rw-r--r--arch/arm/mach-exynos/platsmp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 85c3be63d644..98ffe1e62ad5 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -264,7 +264,7 @@ int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr)
ret = PTR_ERR(boot_reg);
goto fail;
}
- __raw_writel(boot_addr, boot_reg);
+ writel_relaxed(boot_addr, boot_reg);
ret = 0;
}
fail:
@@ -289,7 +289,7 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr)
ret = PTR_ERR(boot_reg);
goto fail;
}
- *boot_addr = __raw_readl(boot_reg);
+ *boot_addr = readl_relaxed(boot_reg);
ret = 0;
}
fail: