diff options
| author | Paul Burton <paul.burton@mips.com> | 2019-10-01 21:53:13 +0000 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-10-07 09:42:22 -0700 |
| commit | fe0065e56227a2f6a6ad717c6d8d871263e482a8 (patch) | |
| tree | 0e0eb1fd53d58310e2b5c7c33ab4c1711b0e9db6 | |
| parent | 5c12a6eff6ae3ed32f1c4d6458e58e6c4e9b2352 (diff) | |
MIPS: barrier: Clean up __sync() definition
Implement __sync() using the new __SYNC() infrastructure, which will
take care of not emitting an instruction for old R3k CPUs that don't
support it. The only behavioral difference is that __sync() will now
provide a compiler barrier on these old CPUs, but that seems like
reasonable behavior anyway.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org
| -rw-r--r-- | arch/mips/include/asm/barrier.h | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h index 657ec01120a4..a117c6d95038 100644 --- a/arch/mips/include/asm/barrier.h +++ b/arch/mips/include/asm/barrier.h @@ -11,20 +11,10 @@ #include <asm/addrspace.h> #include <asm/sync.h> -#ifdef CONFIG_CPU_HAS_SYNC -#define __sync() \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set noreorder\n\t" \ - ".set mips2\n\t" \ - "sync\n\t" \ - ".set pop" \ - : /* no output */ \ - : /* no input */ \ - : "memory") -#else -#define __sync() do { } while(0) -#endif +static inline void __sync(void) +{ + asm volatile(__SYNC(full, always) ::: "memory"); +} static inline void rmb(void) { |