diff options
author | Baruch Siach <baruch@tkos.co.il> | 2018-12-12 08:43:26 +0200 |
---|---|---|
committer | Gregory CLEMENT <gregory.clement@bootlin.com> | 2019-01-10 12:20:32 +0100 |
commit | 59c4dccbc3676144091783c8b46bd51daa4f80bc (patch) | |
tree | 83101fb647c44b13ea175b82da36a4489d80ebb5 | |
parent | 132ac39cffbcfed80ada38ef0fc6d34d95da7be6 (diff) |
arm64: dts: marvell: mcbin: fix PCIe reset signal
The MPP52 signal is on the seconds GPIO instance of CP0, which
corresponds to the &cp0_gpio2 handle.
Rename the property name to the standard '-gpios' suffix while at it.
Fixes: b83e1669adce6 ("arm64: dts: marvell: mcbin: add support for PCIe")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
-rw-r--r-- | arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi index 29ea7e81ec4c..329f8ceeebea 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi @@ -183,7 +183,7 @@ pinctrl-0 = <&cp0_pcie_pins>; num-lanes = <4>; num-viewport = <8>; - reset-gpio = <&cp0_gpio1 20 GPIO_ACTIVE_LOW>; + reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>; status = "okay"; }; |