diff options
| author | Du Huanpeng <u74147@gmail.com> | 2020-08-22 09:47:28 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-08-28 10:50:54 +0200 |
| commit | 04b6ff5f25dece9b0ee244aa768b251cfe855c85 (patch) | |
| tree | 8806a730e47b8caa12fdab4f0fa77ad46b949e3a | |
| parent | c7ac46dac744455047438de7acc63e1236536a83 (diff) | |
serial: 8250_pci: Add WCH384_8S 8 port serial device
Add PCI id for WCH384_8S 8 port PCI-E serial card.
because this card has so many ports, you may have
to check these two options before use it:
CONFIG_SERIAL_8250_RUNTIME_UARTS
CONFIG_SERIAL_8250_NR_UARTS
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Link: https://lore.kernel.org/r/1598060848-27807-1-git-send-email-u74147@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/tty/serial/8250/8250_pci.c | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index 1a74d511b02a..d8f43f23b5b0 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -1776,6 +1776,39 @@ pci_wch_ch38x_setup(struct serial_private *priv, return pci_default_setup(priv, board, port, idx); } + +#define CH384_XINT_ENABLE_REG 0xEB +#define CH384_XINT_ENABLE_BIT 0x02 + +static int pci_wch_ch38x_init(struct pci_dev *dev) +{ + int max_port; + unsigned long iobase; + + + switch (dev->device) { + case 0x3853: /* 8 ports */ + max_port = 8; + break; + default: + return -EINVAL; + } + + iobase = pci_resource_start(dev, 0); + outb(CH384_XINT_ENABLE_BIT, iobase + CH384_XINT_ENABLE_REG); + + return max_port; +} + +static void pci_wch_ch38x_exit(struct pci_dev *dev) +{ + unsigned long iobase; + + iobase = pci_resource_start(dev, 0); + outb(0x0, iobase + CH384_XINT_ENABLE_REG); +} + + static int pci_sunix_setup(struct serial_private *priv, const struct pciserial_board *board, @@ -1867,6 +1900,7 @@ pci_moxa_setup(struct serial_private *priv, #define PCIE_VENDOR_ID_WCH 0x1c00 #define PCIE_DEVICE_ID_WCH_CH382_2S1P 0x3250 #define PCIE_DEVICE_ID_WCH_CH384_4S 0x3470 +#define PCIE_DEVICE_ID_WCH_CH384_8S 0x3853 #define PCIE_DEVICE_ID_WCH_CH382_2S 0x3253 #define PCI_VENDOR_ID_ACCESIO 0x494f @@ -2642,6 +2676,16 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { .subdevice = PCI_ANY_ID, .setup = pci_wch_ch38x_setup, }, + /* WCH CH384 8S card (16850 clone) */ + { + .vendor = PCIE_VENDOR_ID_WCH, + .device = PCIE_DEVICE_ID_WCH_CH384_8S, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .init = pci_wch_ch38x_init, + .exit = pci_wch_ch38x_exit, + .setup = pci_wch_ch38x_setup, + }, /* * ASIX devices with FIFO bug */ @@ -2913,6 +2957,7 @@ enum pci_board_num_t { pbn_fintek_F81512A, pbn_wch382_2, pbn_wch384_4, + pbn_wch384_8, pbn_pericom_PI7C9X7951, pbn_pericom_PI7C9X7952, pbn_pericom_PI7C9X7954, @@ -3650,6 +3695,13 @@ static struct pciserial_board pci_boards[] = { .uart_offset = 8, .first_offset = 0xC0, }, + [pbn_wch384_8] = { + .flags = FL_BASE0, + .num_ports = 8, + .base_baud = 115200, + .uart_offset = 8, + .first_offset = 0x00, + }, /* * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART */ @@ -5566,6 +5618,10 @@ static const struct pci_device_id serial_pci_tbl[] = { PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_wch384_4 }, + { PCIE_VENDOR_ID_WCH, PCIE_DEVICE_ID_WCH_CH384_8S, + PCI_ANY_ID, PCI_ANY_ID, + 0, 0, pbn_wch384_8 }, + /* Fintek PCI serial cards */ { PCI_DEVICE(0x1c29, 0x1104), .driver_data = pbn_fintek_4 }, { PCI_DEVICE(0x1c29, 0x1108), .driver_data = pbn_fintek_8 }, |