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path: root/arch/tile/include/asm/cache.h
AgeCommit message (Expand)AuthorFilesLines
2016-12-16tile: use __ro_after_init instead of tile-specific __write_onceChris Metcalf1-5/+2
2016-11-14tile: handle __ro_after_init like parisc doesChris Metcalf1-0/+3
2013-09-03tile: make __write_once a synonym for __read_mostlyChris Metcalf1-3/+10
2012-07-18tilegx pci: support I/O to arbitrarily-cached pagesChris Metcalf1-3/+9
2011-03-01arch/tile: catch up with section naming convention in 2.6.35Chris Metcalf1-1/+1
2010-08-15arch/tile: rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGNChris Metcalf1-3/+2
2010-07-06arch/tile: catch up on various minor cleanups.Chris Metcalf1-5/+0
2010-07-06tile: set ARCH_KMALLOC_MINALIGNFUJITA Tomonori1-0/+8
2010-07-06tile: remove homegrown L1_CACHE_ALIGN macroFUJITA Tomonori1-1/+0
2010-06-04arch/tile: core support for Tilera 32-bit chips.Chris Metcalf1-0/+50