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authorRomain Izard <romain.izard.pro@gmail.com>2016-02-10 10:56:26 +0100
committerBrian Norris <computersforpeace@gmail.com>2016-02-12 10:27:48 -0800
commit94248462f066ec19b9c184ff66300e6e71977609 (patch)
treeb6be548a1606bbb705625afa6733cb695e318dcb /drivers/mtd/nand/atmel_nand_ecc.h
parent5575075612cadd504dd8c8e1b8c66fa5d48b7042 (diff)
mtd: atmel_nand: Support 32-bit ECC strength
As the SAMA5D2 controller supports the 32-bit ECC strength, accept it as a valid setting when required by the device tree or the NAND parameter page. Then configure the controller to use this new setting. For the binding: Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand/atmel_nand_ecc.h')
-rw-r--r--drivers/mtd/nand/atmel_nand_ecc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h
index ec964c43c932..834d694487bd 100644
--- a/drivers/mtd/nand/atmel_nand_ecc.h
+++ b/drivers/mtd/nand/atmel_nand_ecc.h
@@ -43,6 +43,7 @@
#define PMECC_CFG_BCH_ERR8 (2 << 0)
#define PMECC_CFG_BCH_ERR12 (3 << 0)
#define PMECC_CFG_BCH_ERR24 (4 << 0)
+#define PMECC_CFG_BCH_ERR32 (5 << 0)
#define PMECC_CFG_SECTOR512 (0 << 4)
#define PMECC_CFG_SECTOR1024 (1 << 4)