diff options
| author | Hauke Mehrtens <hauke@hauke-m.de> | 2015-05-29 23:39:47 +0200 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2015-06-06 16:05:50 -0700 |
| commit | 9faa5960eef3204cae6637b530f5e23e53b5a9ef (patch) | |
| tree | 1b907bf0682a066099b4a0ecec3d582b305ebab0 /arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | |
| parent | 9d7ef1b76c131f9b5e0a31fd1444d4fa6b8a841c (diff) | |
ARM: BCM5301X: add NAND flash chip description
This adds the NAND flash chip description for a standard chip found
connected to this SoC. This makes use of generic Broadcom NAND driver
with the iProc interface.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi new file mode 100644 index 000000000000..d10781e36f54 --- /dev/null +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi @@ -0,0 +1,24 @@ +/* + * Broadcom BCM470X / BCM5301X Nand chip defaults. + * + * This should be included if the NAND controller is on chip select 0 + * and uses 8 bit ECC. + * + * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/ { + nand@18028000 { + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + }; + }; +}; |