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path: root/drivers/gpu/drm/i915/intel_ringbuffer.h
AgeCommit message (Expand)AuthorFilesLines
2014-11-19drm/i915: Remove DRI1 ring accessors and APIChris Wilson1-3/+0
2014-11-19drm/i915/bdw: Pin the ringbuffer backing object to GGTT on-demandThomas Daniel1-0/+3
2014-11-19drm/i915/bdw: Clean up execlist queue items in retire_workThomas Daniel1-0/+1
2014-11-14drm/i915: Initialize workarounds in logical ring mode tooMichel Thierry1-1/+4
2014-09-03drm/i915/bdw: Apply workarounds in render ring init functionArun Siluvery1-0/+2
2014-08-14drm/i915/bdw: Handle context switch eventsThomas Daniel1-0/+1
2014-08-14drm/i915/bdw: Two-stage execlist submit processMichel Thierry1-0/+2
2014-08-14drm/i915: Add temporary ring->ctx backpointerOscar Mateo1-0/+7
2014-08-11drm/i915/bdw: GEN-specific logical ring emit batchbuffer startOscar Mateo1-0/+2
2014-08-11drm/i915/bdw: Interrupts with logical ringsOscar Mateo1-0/+1
2014-08-11drm/i915/bdw: GEN-specific logical ring emit flushOscar Mateo1-0/+10
2014-08-11drm/i915/bdw: GEN-specific logical ring emit requestOscar Mateo1-0/+3
2014-08-11drm/i915/bdw: New logical ring submission mechanismOscar Mateo1-0/+3
2014-08-11drm/i915/bdw: GEN-specific logical ring initOscar Mateo1-0/+3
2014-08-11drm/i915/bdw: Generic logical ring init and cleanupOscar Mateo1-5/+1
2014-08-11drm/i915/bdw: Add a context and an engine pointers to the ringbufferDaniel Vetter1-0/+2
2014-08-11drm/i915/bdw: Allocate ringbuffers for Logical Ring ContextsOscar Mateo1-0/+4
2014-08-07drm/i915: Don't accumulate hangcheck score on forward progressMika Kuoppala1-0/+2
2014-07-08drm/i915: Generalize intel_ring_get_tail to take a ringbufOscar Mateo1-2/+2
2014-07-07drm/i915/bdw: implement semaphore signalBen Widawsky1-6/+72
2014-07-07drm/i915: Updating comments.Rodrigo Vivi1-3/+5
2014-06-11drm/i915: Reorder semaphore deadlock checkChris Wilson1-1/+1
2014-05-22drm/i915: s/i915_hw_context/intel_contextOscar Mateo1-2/+2
2014-05-22drm/i915: Split the ringbuffers from the rings (3/3)Oscar Mateo1-3/+5
2014-05-22drm/i915: Split the ringbuffers from the rings (2/3)Oscar Mateo1-22/+5
2014-05-22drm/i915: Split the ringbuffers from the rings (1/3)Oscar Mateo1-1/+23
2014-05-22drm/i915: s/intel_ring_buffer/intel_engine_csOscar Mateo1-36/+36
2014-05-12drm/i915: Use hash tables for the command parserBrad Volkin1-3/+8
2014-05-05drm/i915: Support 64b execbufBen Widawsky1-1/+1
2014-05-05drm/i915: Move ring_begin to signal()Ben Widawsky1-1/+3
2014-05-05drm/i915: Virtualize the ringbuffer signal funcBen Widawsky1-4/+7
2014-05-05drm/i915: Move semaphore specific ring members to structBen Widawsky1-7/+12
2014-05-05drm/i915:Initialize the second BSD ring on BDW GT3 machineZhao Yakui1-1/+3
2014-05-05drm/i915: Update the restrict check to filter out wrong Ring ID passed by use...Zhao Yakui1-0/+1
2014-05-05drm/i915: Preserve ring buffers objects across resumeChris Wilson1-0/+1
2014-04-03drm/i915: Move all ring resets before setting the HWS pageChris Wilson1-0/+1
2014-04-03drm/i915: Invariably invalidate before ctx switchBen Widawsky1-4/+0
2014-03-28drm/i915: Broadwell expands ACTHD to 64bitChris Wilson1-3/+3
2014-03-12drm/i915: wait for rings to become idle once disabledNaresh Kumar Kachhi1-0/+2
2014-03-10Merge tag 'v3.14-rc6' into drm-intel-next-queuedDaniel Vetter1-0/+1
2014-03-07drm/i915: Implement command buffer parsing logicBrad Volkin1-0/+32
2014-02-11drm/i915: Add intel_ring_cachline_align()Ville Syrjälä1-0/+1
2014-02-04drm/i915: Use hangcheck score to find guilty contextMika Kuoppala1-0/+2
2013-09-10drm/i915: Write RING_TAIL once per-requestChris Wilson1-1/+6
2013-09-06drm/i915: include hangcheck action and score in error_stateMika Kuoppala1-0/+1
2013-09-05drm/i915; Preallocate the lazy requestChris Wilson1-0/+1
2013-09-05drm/i915: Rename ring->outstanding_lazy_requestChris Wilson1-3/+3
2013-09-03drm/i915: Embed the ring->private within the struct intel_ring_bufferChris Wilson1-1/+5
2013-08-23drm/i915: Remove I915_READ_{NOPID, SYNC_0, SYNC_1})()Damien Lespiau1-4/+0
2013-08-22drm/i915: give more distinctive names to ring hangcheck action enumsJani Nikula1-1/+6