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path: root/drivers/edac/i10nm_base.c
AgeCommit message (Expand)AuthorFilesLines
2020-11-19EDAC/i10nm: Add Intel Sapphire Rapids server supportQiuxu Zhuo1-9/+25
2020-11-19EDAC/i10nm: Use readl() to access MMIO registersQiuxu Zhuo1-4/+7
2020-06-15EDAC, {skx,i10nm}: Use CPU stepping macro to pass configurationsQiuxu Zhuo1-7/+5
2020-06-01Merge branches 'edac-i10nm' and 'edac-misc' into edac-updates-for-5.8Borislav Petkov1-5/+24
2020-05-19EDAC/skx: Use the mcmtr register to retrieve close_pg/bank_xor_enableQiuxu Zhuo1-1/+1
2020-04-27EDAC/i10nm: Update driver to support different bus number config register off...Qiuxu Zhuo1-4/+14
2020-04-27EDAC, {skx,i10nm}: Make some configurations CPU model specificQiuxu Zhuo1-4/+13
2020-03-24EDAC: Convert to new X86 CPU match macrosThomas Gleixner1-4/+4
2019-11-09EDAC: Replace EDAC_DIMM_PTR() macro with edac_get_dimm() functionRobert Richter1-2/+1
2019-08-28x86/intel: Aggregate microserver namingPeter Zijlstra1-2/+2
2019-06-26EDAC, skx, i10nm: Fix source ID register offsetQiuxu Zhuo1-1/+1
2019-06-26EDAC, i10nm: Check ECC enabling status per channelQiuxu Zhuo1-3/+3
2019-06-20EDAC, i10nm: Add Intel additional Ice-Lake supportQiuxu Zhuo1-0/+2
2019-03-23EDAC, skx, i10nm: Make skx_common.c a pure libraryQiuxu Zhuo1-2/+50
2019-02-02EDAC, i10nm: Add a driver for Intel 10nm server processorsQiuxu Zhuo1-0/+275