| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2018-01-26 | Merge branch 'clk-divider-container' into clk-next | Stephen Boyd | 1 | -1/+2 |
| 2017-12-21 | clk: sprd: add clocks support for SC9860 | Chunyan Zhang | 3 | -0/+1987 |
| 2017-12-21 | clk: sprd: add adjustable pll support | Chunyan Zhang | 3 | -0/+375 |
| 2017-12-21 | clk: sprd: add composite clock support | Chunyan Zhang | 3 | -0/+112 |
| 2017-12-21 | clk: sprd: add divider clock support | Chunyan Zhang | 3 | -0/+166 |
| 2017-12-21 | clk: sprd: add mux clock support | Chunyan Zhang | 3 | -0/+151 |
| 2017-12-21 | clk: sprd: add gate clock support | Chunyan Zhang | 3 | -0/+171 |
| 2017-12-21 | clk: sprd: Add common infrastructure | Chunyan Zhang | 4 | -0/+141 |
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index : drm-tip | |
| DRM current development and nightly trees | danvet |
| summaryrefslogtreecommitdiff |