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path: root/drivers/clk/rockchip/clk-rk3399.c
AgeCommit message (Expand)AuthorFilesLines
2021-11-02clk: rockchip: drop module parts from rk3399 and rk3568 driversHeiko Stuebner1-4/+0
2021-11-02Revert "clk: rockchip: use module_platform_driver_probe"Heiko Stuebner1-1/+1
2021-09-21clk: rockchip: use module_platform_driver_probeMiles Chen1-1/+1
2021-09-20clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L}Brian Norris1-2/+2
2021-09-20clk: rockchip: rk3399: make CPU clocks criticalBrian Norris1-4/+7
2021-03-21clk: rockchip: drop MODULE_ALIAS from rk3399 clock controllerHeiko Stuebner1-1/+0
2021-03-21clk: rockchip: support more core div settingElaine Zhang1-6/+8
2020-09-22clk: rockchip: rk3399: Support module buildElaine Zhang1-0/+56
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-9/+3
2019-06-15clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macroHeiko Stuebner1-9/+3
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner1-10/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd1-0/+1
2018-08-06clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399Levin Du1-0/+1
2018-07-08clk: rockchip: fix clk_i2sout parent selection bits on rk3399Alberto Panizzo1-1/+1
2018-03-23clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399Lin Huang1-2/+2
2018-03-14clk: rockchip: Add 1.6GHz PLL rate for rk3399Derek Basehore1-0/+1
2017-06-02clk: rockchip: add ids for rk3399 testclks used for camera handlingEddie Cai1-2/+2
2017-03-06clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399Douglas Anderson1-4/+4
2017-01-18clk: rockchip: fix the incorrect pclk_edp div width for RK3399Xing Zheng1-1/+1
2016-11-16clk: rockchip: fix copy-paste error in rk3399 testclkJianqun Xu1-2/+2
2016-11-05clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktreeJianqun Xu1-11/+11
2016-11-02clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399Xing Zheng1-2/+2
2016-10-21clk: rockchip: add 533.25MHz to rk3399 clock rates tableXing Zheng1-0/+1
2016-09-06Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd1-15/+41
2016-09-04clk: rockchip: use the dclk_vop_frac clock ids on rk3399Yakir Yang1-2/+2
2016-09-04clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividersDouglas Anderson1-13/+13
2016-09-04clk: rockchip: add 2016M to big cpu clk rate table on rk3399Shunqian Zheng1-0/+1
2016-09-04clk: rockchip: add rk3399 ddr clock supportLin Huang1-0/+19
2016-08-24clk: rockchip: mark aclk_emmc_noc as a critical clock on rk3399Xing Zheng1-0/+1
2016-08-12clk: rockchip: fix incorrect GATE bits for {c, g}pll_aclk_perihp_src on rk3399Xing Zheng1-2/+2
2016-08-12clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399Xing Zheng1-2/+2
2016-08-12clk: rockchip: mark rk3399 hdcp_noc and vio_noc as criticalChris Zhong1-0/+4
2016-08-11clk: rockchip: fix rk3399 aclk_vio gate bitChris Zhong1-1/+1
2016-08-08clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399Elaine Zhang1-2/+2
2016-08-08clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMIXing Zheng1-0/+2
2016-07-01Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd1-1/+10
2016-07-01clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bitsXing Zheng1-1/+1
2016-06-03clk: rockchip: release io resource when failing to init clk on rk3399Shawn Lin1-0/+2
2016-05-30clk: rockchip: add a dummy clock for the watchdog pclk on rk3399Xing Zheng1-0/+9
2016-05-30clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_srcXing Zheng1-2/+2
2016-05-30clk: rockchip: mark rk3399 GIC clocks as criticalBrian Norris1-0/+2
2016-05-08clk: rockchip: fix the rk3399 sdmmc sample / drv nameDouglas Anderson1-2/+2
2016-04-25clk: rockchip: fix the rk3399 cifout clockXing Zheng1-5/+6
2016-04-25clk: rockchip: drop unnecessary CLK_IGNORE_UNUSED flags from rk3399Xing Zheng1-157/+157
2016-04-25clk: rockchip: add some frequencies on the rk3399 PLL tableXing Zheng1-1/+10
2016-04-25clk: rockchip: assign more necessary rk3399 clock idsXing Zheng1-6/+6
2016-04-25clk: rockchip: fix the gate bit for i2c4 and i2c8 on rk3399Xing Zheng1-2/+2
2016-04-19clk: rockchip: reign in some overly long lines in the rk3399 controllerHeiko Stuebner1-58/+81
2016-03-28clk: rockchip: add clock controller for the RK3399Xing Zheng1-0/+1540