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path: root/arch/sh/mm/tlb-sh4.c
AgeCommit message (Expand)AuthorFilesLines
2010-04-02sh: Fix up the SH-3 build for recent TLB changes.Paul Mundt1-0/+28
2010-01-26sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt1-5/+5
2010-01-21sh: Kill off the special uncached section and fixmap.Paul Mundt1-2/+1
2010-01-19sh: Split out MMUCR.URB based entry wiring in to shared helper.Paul Mundt1-66/+0
2010-01-16sh: New extended page flag to wire/unwire TLB entriesMatt Fleming1-0/+66
2009-09-01Merge branch 'master' into sh/smpPaul Mundt1-3/+6
2009-08-20sh: Better description of SH-4 PTEA register update.Michael Trimarchi1-3/+6
2009-07-29sh: Handle a NULL vma in __update_tlb() for the fast-path.Paul Mundt1-1/+1
2009-07-29sh: update_mmu_cache() consolidation.Paul Mundt1-23/+6
2009-07-22sh: Migrate from PG_mapped to PG_dcache_dirty.Paul Mundt1-12/+11
2008-01-28sh: Preparation for uncached jumps through PMB.Stuart Menefy1-3/+4
2007-09-21sh: Fix up extended mode TLB for SH-X2+ cores.Paul Mundt1-17/+13
2007-09-21sh: Support explicit L1 cache disabling.Paul Mundt1-10/+15
2007-03-05sh: Revert lazy dcache writeback changes.Paul Mundt1-1/+67
2007-02-13sh: Local TLB flushing variants for SMP prep.Paul Mundt1-1/+1
2007-02-13sh: Lazy dcache writeback optimizations.Paul Mundt1-67/+1
2006-09-27sh: Add flag for MMU PTEA capability.Paul Mundt1-8/+4
2006-09-27sh: Support for SH7770/SH7780 CPU subtypes.Paul Mundt1-0/+4
2005-04-16Linux-2.6.12-rc2Linus Torvalds1-0/+96
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