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path: root/arch/riscv/include/asm/sbi.h
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2024-09-24Merge tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+1
2024-09-20perf/riscv-sbi: Add platform specific firmware event handlingMayuresh Chitale1-0/+1
2024-09-03riscv: Fix RISCV_ALTERNATIVE_EARLYAlexandre Ghiti1-1/+19
2024-07-10riscv: Improve sbi_ecall() code generation by reordering argumentsAlexandre Ghiti1-4/+6
2024-05-22Merge patch series "riscv: Extension parsing fixes"Palmer Dabbelt1-0/+2
2024-05-22Merge tag 'riscv-for-linus-6.10-mw1' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+4
2024-05-22riscv: cpufeature: Fix thead vector hwcap removalCharlie Jenkins1-0/+2
2024-04-29riscv: Use IPIs for remote cache/TLB flushes by defaultSamuel Holland1-0/+4
2024-04-22RISC-V: Use the minor version mask while computing sbi versionAtish Patra1-2/+2
2024-04-22RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic nameAtish Patra1-1/+1
2024-04-22RISC-V: Add SBI PMU snapshot definitionsAtish Patra1-0/+11
2024-04-22drivers/perf: riscv: Use BIT macro for shifting operationsAtish Patra1-10/+10
2024-04-22RISC-V: Add FIRMWARE_READ_HI definitionAtish Patra1-0/+1
2024-01-20Merge tag 'riscv-for-linus-6.8-mw4' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-0/+19
2024-01-11Merge patch series "RISC-V SBI debug console extension support"Palmer Dabbelt1-0/+10
2024-01-11riscv: sbi: Introduce system suspend supportAndrew Jones1-0/+9
2024-01-10RISC-V: Add SBI debug console helper routinesAnup Patel1-0/+5
2024-01-10RISC-V: Add stubs for sbi_console_putchar/getchar()Anup Patel1-0/+5
2023-12-30RISC-V: Add SBI STA extension definitionsAndrew Jones1-0/+17
2023-11-10Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-3/+0
2023-11-06riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlbAlexandre Ghiti1-3/+0
2023-10-20RISC-V: Add defines for SBI debug console extensionAnup Patel1-0/+7
2023-04-29RISC-V: Align SBI probe implementation with specAndrew Jones1-1/+1
2023-04-08RISC-V: Treat IPIs as normal Linux IRQsAnup Patel1-2/+7
2023-02-07RISC-V: Improve SBI PMU extension related definitionsAtish Patra1-2/+5
2022-10-27RISC-V: Cache SBI vendor valuesHeiko Stuebner1-0/+5
2022-08-11RISC-V: Improve SBI definitionsAtish Patra1-2/+16
2022-08-11RISC-V: Move counter info definition to sbi header fileAtish Patra1-0/+14
2022-03-25Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+95
2022-03-21RISC-V: Add RISC-V SBI PMU extension definitionsAtish Patra1-0/+95
2022-03-11RISC-V: Add SBI HSM suspend related definesAnup Patel1-5/+22
2022-01-20RISC-V: Do not use cpumask data structure for hartid bitmapAtish Patra1-9/+10
2022-01-19Merge tag 'riscv-for-linus-5.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+24
2022-01-11RISC-V: Use SBI SRST extension when availableAnup Patel1-0/+24
2022-01-06RISC-V: KVM: Add SBI HSM extension in KVMAtish Patra1-0/+1
2022-01-06RISC-V: KVM: Add SBI v0.2 base extensionAtish Patra1-0/+8
2021-05-06Merge tag 'riscv-for-linus-5.13-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+3
2021-04-26riscv: Add 3 SBI wrapper functions to get cpu manufacturer informationVincent Chen1-0/+3
2021-03-09RISC-V: correct enum sbi_ext_rfence_fidHeinrich Schuchardt1-2/+2
2021-02-22RISC-V: Add a non-void return for sbi v02 functionsAtish Patra1-5/+5
2021-01-07riscv: Cleanup sbi function stubs when RISCV_SBI disabledKefeng Wang1-7/+3
2020-03-31RISC-V: Add SBI HSM extension definitionsAtish Patra1-0/+14
2020-03-31RISC-V: Export SBI error to linux error mapping functionAtish Patra1-0/+2
2020-03-31RISC-V: Implement new SBI v0.2 extensionsAtish Patra1-0/+14
2020-03-31RISC-V: Introduce a new config for SBI v0.1Atish Patra1-0/+2
2020-03-31RISC-V: Add SBI v0.2 extension definitionsAtish Patra1-0/+21
2020-03-31RISC-V: Add basic support for SBI v0.2Atish Patra1-71/+68
2020-03-31RISC-V: Mark existing SBI as 0.1 SBI.Atish Patra1-19/+22
2019-11-17riscv: provide native clint access for M-modeChristoph Hellwig1-0/+2
2019-11-13riscv: add support for MMIO access to the timer registersChristoph Hellwig1-1/+2