summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/highbank.dts
AgeCommit message (Expand)AuthorFilesLines
2023-06-21ARM: dts: Move .dts files to vendor sub-directoriesRob Herring1-158/+0
2020-03-26arm: dts: calxeda: Fix interrupt groupingAndre Przywara1-2/+2
2020-03-26arm: dts: calxeda: Basic DT file fixesAndre Przywara1-5/+2
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner1-12/+1
2018-07-02arm: dts: highbank: Add missing OPP properties for CPUsViresh Kumar1-0/+30
2013-11-04ARM: dts: calxeda: move memory-controller node out of ecx-common.dtsiRob Herring1-0/+6
2013-02-02cpufreq / highbank: add support for highbank cpufreqMark Langsdorf1-0/+10
2013-01-07ARM: dts: fix highbank cpu mpidr valuesRob Herring1-8/+8
2013-01-07ARM: dts: add device_type prop to cpu nodes on Calxeda platformsRob Herring1-0/+4
2012-10-31ARM: dts: Add Calxeda ECX-2000 supportRob Herring1-216/+3
2012-10-31ARM: highbank: enable coherent DMA for xgmac in dtsRob Herring1-0/+2
2012-10-31ARM: highbank: disable unused sdhci and gpio in dtsRob Herring1-0/+5
2012-10-02Merge branch 'for-v3.7' of git://git.linaro.org/people/mszyprowski/linux-dma-...Linus Torvalds1-0/+1
2012-10-02ARM: highbank: add coherent DMA setupRob Herring1-0/+1
2012-09-13ata: add platform driver for Calxeda AHCI controllerMark Langsdorf1-0/+17
2012-07-30Merge git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edacLinus Torvalds1-0/+12
2012-07-11clk: add highbank clock supportRob Herring1-1/+90
2012-06-27edac: add support for Calxeda highbank L2 cache eccRob Herring1-0/+6
2012-06-27edac: add support for Calxeda highbank memory controllerRob Herring1-0/+6
2012-04-14ARM: dts: remove blank interrupt-parent propertiesRob Herring1-1/+0
2012-03-13ARM: highbank: convert to twd_local_timer_register() interfaceMarc Zyngier1-4/+4
2011-12-05ARM: highbank: add xgmac ethernet devices to dtsRob Herring1-0/+12
2011-10-31ARM: highbank: add devicetree sourceRob Herring1-0/+198
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 20:19:54 +0000