summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h')
-rw-r--r--drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h121
1 files changed, 107 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index d103ec1eaa73..b20a39f488ae 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -26,6 +26,15 @@
#ifndef _DMUB_CMD_H_
#define _DMUB_CMD_H_
+#if defined(_TEST_HARNESS) || defined(FPGA_USB4)
+#include "dmub_fw_types.h"
+#include "include_legacy/atomfirmware.h"
+
+#if defined(_TEST_HARNESS)
+#include <string.h>
+#endif
+#else
+
#include <asm/byteorder.h>
#include <linux/types.h>
#include <linux/string.h>
@@ -34,12 +43,14 @@
#include "atomfirmware.h"
+#endif // defined(_TEST_HARNESS) || defined(FPGA_USB4)
+
/* Firmware versioning. */
#ifdef DMUB_EXPOSE_VERSION
-#define DMUB_FW_VERSION_GIT_HASH 0x9cf8f05fe
+#define DMUB_FW_VERSION_GIT_HASH 0x931573111
#define DMUB_FW_VERSION_MAJOR 0
#define DMUB_FW_VERSION_MINOR 0
-#define DMUB_FW_VERSION_REVISION 35
+#define DMUB_FW_VERSION_REVISION 45
#define DMUB_FW_VERSION_TEST 0
#define DMUB_FW_VERSION_VBIOS 0
#define DMUB_FW_VERSION_HOTFIX 0
@@ -55,6 +66,8 @@
//<DMUB_TYPES>==================================================================
/* Basic type definitions. */
+#define __forceinline inline
+
#define SET_ABM_PIPE_GRADUALLY_DISABLE 0
#define SET_ABM_PIPE_IMMEDIATELY_DISABLE 255
#define SET_ABM_PIPE_IMMEDIATE_KEEP_GAIN_DISABLE 254
@@ -104,12 +117,15 @@ union dmub_psr_debug_flags {
uint32_t u32All;
};
+struct dmub_feature_caps {
+ uint8_t psr;
+ uint8_t reserved[7];
+};
+
#if defined(__cplusplus)
}
#endif
-
-
//==============================================================================
//</DMUB_TYPES>=================================================================
//==============================================================================
@@ -189,7 +205,10 @@ union dmub_fw_boot_options {
uint32_t pemu_env : 1;
uint32_t fpga_env : 1;
uint32_t optimized_init : 1;
- uint32_t reserved : 29;
+ uint32_t skip_phy_access : 1;
+ uint32_t disable_clk_gate: 1;
+ uint32_t skip_phy_init_panel_sequence: 1;
+ uint32_t reserved : 26;
} bits;
uint32_t all;
};
@@ -272,6 +291,7 @@ enum dmub_gpint_command {
* ARGS: Stream mask, 1 bit per active stream index.
*/
DMUB_GPINT__IDLE_OPT_NOTIFY_STREAM_MASK = 8,
+ DMUB_GPINT__PSR_RESIDENCY = 9,
};
//==============================================================================
@@ -297,7 +317,9 @@ enum dmub_cmd_type {
DMUB_CMD__REG_SEQ_BURST_WRITE = 3,
DMUB_CMD__REG_REG_WAIT = 4,
DMUB_CMD__PLAT_54186_WA = 5,
+ DMUB_CMD__QUERY_FEATURE_CAPS = 6,
DMUB_CMD__PSR = 64,
+ DMUB_CMD__MALL = 65,
DMUB_CMD__ABM = 66,
DMUB_CMD__HW_LOCK = 69,
DMUB_CMD__DP_AUX_ACCESS = 70,
@@ -316,7 +338,8 @@ enum dmub_out_cmd_type {
struct dmub_cmd_header {
unsigned int type : 8;
unsigned int sub_type : 8;
- unsigned int reserved0 : 8;
+ unsigned int ret_status : 1;
+ unsigned int reserved0 : 7;
unsigned int payload_bytes : 6; /* up to 60 bytes */
unsigned int reserved1 : 2;
};
@@ -425,6 +448,18 @@ struct dmub_rb_cmd_PLAT_54186_wa {
struct dmub_cmd_PLAT_54186_wa flip;
};
+struct dmub_rb_cmd_mall {
+ struct dmub_cmd_header header;
+ union dmub_addr cursor_copy_src;
+ union dmub_addr cursor_copy_dst;
+ uint32_t tmr_delay;
+ uint32_t tmr_scale;
+ uint16_t cursor_width;
+ uint16_t cursor_pitch;
+ uint16_t cursor_height;
+ uint8_t cursor_bpp;
+};
+
struct dmub_cmd_digx_encoder_control_data {
union dig_encoder_control_parameters_v1_5 dig;
};
@@ -477,6 +512,14 @@ enum dp_aux_request_action {
DP_AUX_REQ_ACTION_DPCD_READ = 0x90
};
+enum aux_return_code_type {
+ AUX_RET_SUCCESS = 0,
+ AUX_RET_ERROR_TIMEOUT,
+ AUX_RET_ERROR_NO_DATA,
+ AUX_RET_ERROR_INVALID_OPERATION,
+ AUX_RET_ERROR_PROTOCOL_ERROR,
+};
+
/* DP AUX command */
struct aux_transaction_parameters {
uint8_t is_i2c_over_aux;
@@ -526,6 +569,17 @@ struct dmub_rb_cmd_dp_aux_reply {
struct aux_reply_data reply_data;
};
+/* DP HPD Notify command - OutBox Cmd */
+enum dp_hpd_type {
+ DP_HPD = 0,
+ DP_IRQ
+};
+
+enum dp_hpd_status {
+ DP_HPD_UNPLUG = 0,
+ DP_HPD_PLUG
+};
+
struct dp_hpd_data {
uint8_t phy_port_index;
uint8_t hpd_type;
@@ -549,6 +603,7 @@ enum dmub_cmd_psr_type {
DMUB_CMD__PSR_ENABLE = 2,
DMUB_CMD__PSR_DISABLE = 3,
DMUB_CMD__PSR_SET_LEVEL = 4,
+ DMUB_CMD__PSR_FORCE_STATIC = 5,
};
enum psr_version {
@@ -556,12 +611,22 @@ enum psr_version {
PSR_VERSION_UNSUPPORTED = 0xFFFFFFFF,
};
+enum dmub_cmd_mall_type {
+ DMUB_CMD__MALL_ACTION_ALLOW = 0,
+ DMUB_CMD__MALL_ACTION_DISALLOW = 1,
+ DMUB_CMD__MALL_ACTION_COPY_CURSOR = 2,
+};
+
struct dmub_cmd_psr_copy_settings_data {
union dmub_psr_debug_flags debug;
uint16_t psr_level;
uint8_t dpp_inst;
+ /* opp_inst and mpcc_inst will not be used in dmub fw,
+ * dmub fw will get active opp by reading odm registers.
+ */
uint8_t mpcc_inst;
uint8_t opp_inst;
+
uint8_t otg_inst;
uint8_t digfe_inst;
uint8_t digbe_inst;
@@ -570,7 +635,8 @@ struct dmub_cmd_psr_copy_settings_data {
uint8_t smu_optimizations_en;
uint8_t frame_delay;
uint8_t frame_cap_ind;
- uint8_t pad[3];
+ uint8_t pad[2];
+ uint8_t multi_disp_optimizations_en;
uint16_t init_sdp_deadline;
uint16_t pad2;
};
@@ -603,6 +669,10 @@ struct dmub_rb_cmd_psr_set_version {
struct dmub_cmd_psr_set_version_data psr_set_version_data;
};
+struct dmub_rb_cmd_psr_force_static {
+ struct dmub_cmd_header header;
+};
+
union dmub_hw_lock_flags {
struct {
uint8_t lock_pipe : 1;
@@ -744,7 +814,16 @@ struct dmub_rb_cmd_abm_init_config {
struct dmub_cmd_abm_init_config_data abm_init_config_data;
};
-union dmub_rb_cmd {
+struct dmub_cmd_query_feature_caps_data {
+ struct dmub_feature_caps feature_caps;
+};
+
+struct dmub_rb_cmd_query_feature_caps {
+ struct dmub_cmd_header header;
+ struct dmub_cmd_query_feature_caps_data query_feature_caps_data;
+};
+
+ union dmub_rb_cmd {
struct dmub_rb_cmd_lock_hw lock_hw;
struct dmub_rb_cmd_read_modify_write read_modify_write;
struct dmub_rb_cmd_reg_field_update_sequence reg_field_update_seq;
@@ -760,7 +839,9 @@ union dmub_rb_cmd {
struct dmub_rb_cmd_psr_copy_settings psr_copy_settings;
struct dmub_rb_cmd_psr_enable psr_enable;
struct dmub_rb_cmd_psr_set_level psr_set_level;
+ struct dmub_rb_cmd_psr_force_static psr_force_static;
struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa;
+ struct dmub_rb_cmd_mall mall;
struct dmub_rb_cmd_abm_set_pipe abm_set_pipe;
struct dmub_rb_cmd_abm_set_backlight abm_set_backlight;
struct dmub_rb_cmd_abm_set_level abm_set_level;
@@ -769,6 +850,7 @@ union dmub_rb_cmd {
struct dmub_rb_cmd_abm_init_config abm_init_config;
struct dmub_rb_cmd_dp_aux_access dp_aux_access;
struct dmub_rb_cmd_outbox1_enable outbox1_enable;
+ struct dmub_rb_cmd_query_feature_caps query_feature_caps;
};
union dmub_rb_out_cmd {
@@ -831,7 +913,7 @@ static inline bool dmub_rb_push_front(struct dmub_rb *rb,
{
uint64_t volatile *dst = (uint64_t volatile *)(rb->base_address) + rb->wrpt / sizeof(uint64_t);
const uint64_t *src = (const uint64_t *)cmd;
- int i;
+ uint8_t i;
if (dmub_rb_full(rb))
return false;
@@ -868,14 +950,14 @@ static inline bool dmub_rb_out_push_front(struct dmub_rb *rb,
}
static inline bool dmub_rb_front(struct dmub_rb *rb,
- union dmub_rb_cmd *cmd)
+ union dmub_rb_cmd **cmd)
{
- uint8_t *rd_ptr = (uint8_t *)rb->base_address + rb->rptr;
+ uint8_t *rb_cmd = (uint8_t *)(rb->base_address) + rb->rptr;
if (dmub_rb_empty(rb))
return false;
- dmub_memcpy(cmd, rd_ptr, DMUB_RB_CMD_SIZE);
+ *cmd = (union dmub_rb_cmd *)rb_cmd;
return true;
}
@@ -885,7 +967,7 @@ static inline bool dmub_rb_out_front(struct dmub_rb *rb,
{
const uint64_t volatile *src = (const uint64_t volatile *)(rb->base_address) + rb->rptr / sizeof(uint64_t);
uint64_t *dst = (uint64_t *)cmd;
- int i;
+ uint8_t i;
if (dmub_rb_empty(rb))
return false;
@@ -917,7 +999,7 @@ static inline void dmub_rb_flush_pending(const struct dmub_rb *rb)
while (rptr != wptr) {
uint64_t volatile *data = (uint64_t volatile *)rb->base_address + rptr / sizeof(uint64_t);
- int i;
+ uint8_t i;
for (i = 0; i < DMUB_RB_CMD_SIZE / sizeof(uint64_t); i++)
*data++;
@@ -937,6 +1019,17 @@ static inline void dmub_rb_init(struct dmub_rb *rb,
rb->wrpt = init_params->write_ptr;
}
+static inline void dmub_rb_get_return_data(struct dmub_rb *rb,
+ union dmub_rb_cmd *cmd)
+{
+ // Copy rb entry back into command
+ uint8_t *rd_ptr = (rb->rptr == 0) ?
+ (uint8_t *)rb->base_address + rb->capacity - DMUB_RB_CMD_SIZE :
+ (uint8_t *)rb->base_address + rb->rptr - DMUB_RB_CMD_SIZE;
+
+ dmub_memcpy(cmd, rd_ptr, DMUB_RB_CMD_SIZE);
+}
+
#if defined(__cplusplus)
}
#endif