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-rw-r--r--drivers/soc/mediatek/mtk-pm-domains.c3
-rw-r--r--drivers/soc/mediatek/mtk-pm-domains.h23
2 files changed, 17 insertions, 9 deletions
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 88dec58aedd9..03279a999dfc 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -161,6 +161,9 @@ static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
else
regmap_write(regmap, bpd[i].bus_prot_clr, mask);
+ if (bpd[i].ignore_clr_ack)
+ continue;
+
ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
val, !(val & mask),
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index 20df5689739b..809d2d43f01d 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -35,19 +35,23 @@
#define SPM_MAX_BUS_PROT_DATA 5
-#define _BUS_PROT(_mask, _set, _clr, _sta, _update) { \
- .bus_prot_mask = (_mask), \
- .bus_prot_set = _set, \
- .bus_prot_clr = _clr, \
- .bus_prot_sta = _sta, \
- .bus_prot_reg_update = _update, \
+#define _BUS_PROT(_mask, _set, _clr, _sta, _update, _ignore) { \
+ .bus_prot_mask = (_mask), \
+ .bus_prot_set = _set, \
+ .bus_prot_clr = _clr, \
+ .bus_prot_sta = _sta, \
+ .bus_prot_reg_update = _update, \
+ .ignore_clr_ack = _ignore, \
}
-#define BUS_PROT_WR(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, false)
+#define BUS_PROT_WR(_mask, _set, _clr, _sta) \
+ _BUS_PROT(_mask, _set, _clr, _sta, false, false)
+
+#define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \
+ _BUS_PROT(_mask, _set, _clr, _sta, false, true)
#define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, true)
+ _BUS_PROT(_mask, _set, _clr, _sta, true, false)
#define BUS_PROT_UPDATE_TOPAXI(_mask) \
BUS_PROT_UPDATE(_mask, \
@@ -61,6 +65,7 @@ struct scpsys_bus_prot_data {
u32 bus_prot_clr;
u32 bus_prot_sta;
bool bus_prot_reg_update;
+ bool ignore_clr_ack;
};
#define MAX_SUBSYS_CLKS 10