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author | Thierry Reding <treding@nvidia.com> | 2015-05-04 16:38:28 +0200 |
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committer | Thierry Reding <treding@nvidia.com> | 2015-07-16 10:38:30 +0200 |
commit | b23083a9c6829675d367b4f06a64d74ead82eb14 (patch) | |
tree | 9737df8839092fff8a54c9181dce3a0fc4b194bb /tools | |
parent | 03b3f4c8b76180ba5bd800c57a7efdb142c2341d (diff) |
soc/tegra: fuse: Add spare bit offset for Tegra114
The offset of the first spare bit register on Tegra114 is 0x280, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions