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authorRichard Fitzgerald <rf@opensource.cirrus.com>2023-09-13 16:00:10 +0100
committerMark Brown <broonie@kernel.org>2023-09-13 16:03:19 +0100
commit41dac81b56c82c51a6d00fda5f3af7691ffee2d7 (patch)
tree4962e7a3891fb31d440398b58932f2f3f413602e /sound
parentec83a0b39a20d0d9617fa61ff2883404f0f90504 (diff)
ASoC: cs42l42: Ensure a reset pulse meets minimum pulse width.
The CS42L42 can accept very short reset pulses of a few microseconds but there's no reason to force a very short pulse. Allow a wide range for the usleep_range() so it can be relaxed about the choice of timing source. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230913150012.604775-2-sbinding@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/cs42l42.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index a0de0329406a..56d2857a4f01 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -2320,6 +2320,10 @@ int cs42l42_common_probe(struct cs42l42_private *cs42l42,
if (cs42l42->reset_gpio) {
dev_dbg(cs42l42->dev, "Found reset GPIO\n");
+
+ /* Ensure minimum reset pulse width */
+ usleep_range(10, 500);
+
gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
}
usleep_range(CS42L42_BOOT_TIME_US, CS42L42_BOOT_TIME_US * 2);