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authorShengjiu Wang <shengjiu.wang@nxp.com>2022-07-01 17:32:37 +0800
committerMark Brown <broonie@kernel.org>2022-07-05 13:00:38 +0100
commit34dcdebecf2f05e1b275e1da8352f8e4c1aab6f6 (patch)
treed9bec6689236510f0f296a10be616dfedf88717d /sound/soc/fsl/Kconfig
parent7bad8125549cda14d9ccf97d7d76f7ef6ac9d206 (diff)
ASoC: fsl_spdif: Add support for PLL switch at runtime.
i.MX8MQ/MN/MM/MP platforms typically have 2 AUDIO PLLs being configured to handle 8kHz and 11kHz series audio rates. The patch implements the functionality to select at runtime the appropriate AUDIO PLL as function of audio file rate. As the clock parent may be changed, need to probe txclk according to sample rate again. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1656667961-1799-3-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/fsl/Kconfig')
-rw-r--r--sound/soc/fsl/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig
index 10fa38753453..910b8747b6bd 100644
--- a/sound/soc/fsl/Kconfig
+++ b/sound/soc/fsl/Kconfig
@@ -59,6 +59,7 @@ config SND_SOC_FSL_SPDIF
select SND_SOC_IMX_PCM_DMA if SND_IMX_SOC != n
select SND_SOC_IMX_PCM_FIQ if SND_IMX_SOC != n && (MXC_TZIC || MXC_AVIC)
select BITREVERSE
+ select SND_SOC_FSL_UTILS
help
Say Y if you want to add Sony/Philips Digital Interface (SPDIF)
support for the Freescale CPUs.