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author | Linus Walleij <linus.walleij@linaro.org> | 2017-06-21 09:59:52 +0200 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-06-21 10:45:54 -0700 |
commit | 846423f96721d5c1c2fad6b43b3f1359002907d5 (patch) | |
tree | 97c6d36152e7ad88ddf357322d29ef8e4b1c8aea /mm/msync.c | |
parent | e293915a6edf3c57bd9f8101249221f5fc5f8bfe (diff) |
clk: Add Gemini SoC clock controller
The Cortina Systems Gemini (SL3516/CS3516) has an on-chip clock
controller that derive all clocks from a single crystal, using some
documented and some undocumented PLLs, half dividers, counters and
gates. This is a best attempt to construct a clock driver for the
clocks so at least we can gate off unused hardware and driver the
PCI bus clock.
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[sboyd@codeaurora.org: Fix devm_ioremap_resource() return value
checking]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'mm/msync.c')
0 files changed, 0 insertions, 0 deletions