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author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-15 10:07:31 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-15 10:07:31 -0700 |
commit | 2ffd45da0b06b26f30480584de7c660d84b2d7dc (patch) | |
tree | 4d4a71452276cef699317ccbc5d58492643b4dee /include | |
parent | 5e0497553643b6c6acd16c389afb9cec210f4ea9 (diff) | |
parent | 8b68788bebd3f697ae62aa9af3dac35ed112ebd7 (diff) |
Merge tag 'drm-fixes-2024-07-12' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie:
"Oh I screwed up last week's fixes pull, and forgot to send..
Back to work, thanks to Sima for last week, not too many fixes as
expected getting close to release [ sic - Linus ], amdgpu and xe have
a couple each, and then some other misc ones.
amdgpu:
- PSR-SU fix
- Reseved VMID fix
xe:
- Use write-back caching mode for system memory on DGFX
- Do not leak object when finalizing hdcp gsc
bridge:
- adv7511 EDID irq fix
gma500:
- NULL mode fixes.
meson:
- fix resource leak"
* tag 'drm-fixes-2024-07-12' of https://gitlab.freedesktop.org/drm/kernel:
Revert "drm/amd/display: Reset freesync config before update new state"
drm/xe/display/xe_hdcp_gsc: Free arbiter on driver removal
drm/xe: Use write-back caching mode for system memory on DGFX
drm/amdgpu: reject gang submit on reserved VMIDs
drm/gma500: fix null pointer dereference in cdv_intel_lvds_get_modes
drm/gma500: fix null pointer dereference in psb_intel_lvds_get_modes
drm/meson: fix canvas release in bind function
drm/bridge: adv7511: Fix Intermittent EDID failures
Diffstat (limited to 'include')
-rw-r--r-- | include/uapi/drm/xe_drm.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h index 1446c3bae515..d425b83181df 100644 --- a/include/uapi/drm/xe_drm.h +++ b/include/uapi/drm/xe_drm.h @@ -776,7 +776,13 @@ struct drm_xe_gem_create { #define DRM_XE_GEM_CPU_CACHING_WC 2 /** * @cpu_caching: The CPU caching mode to select for this object. If - * mmaping the object the mode selected here will also be used. + * mmaping the object the mode selected here will also be used. The + * exception is when mapping system memory (including data evicted + * to system) on discrete GPUs. The caching mode selected will + * then be overridden to DRM_XE_GEM_CPU_CACHING_WB, and coherency + * between GPU- and CPU is guaranteed. The caching mode of + * existing CPU-mappings will be updated transparently to + * user-space clients. */ __u16 cpu_caching; /** @pad: MBZ */ |