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authorPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>2022-08-23 13:38:46 +0800
committerVinod Koul <vkoul@kernel.org>2022-09-01 14:29:15 +0530
commit279e46bc298629b26436c90bd4b5d104cc1e0fb2 (patch)
tree88effb732ce655dd2b9855411c6ee433b38f29da /include/linux/soundwire
parentbc7b9595392407549158651bc760c9bda2ab8b5d (diff)
soundwire: intel: cleanup WakeEnable and WakeStatus
Regroup offset and bitfield definitions. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20220823053846.2684635-12-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'include/linux/soundwire')
-rw-r--r--include/linux/soundwire/sdw_intel.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 3a56fd5a6331..2e9fd91572d4 100644
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -76,9 +76,16 @@
#define SDW_SHIM_IOCTL_CIBD BIT(8)
#define SDW_SHIM_IOCTL_DIBD BIT(9)
+/* Wake Enable*/
#define SDW_SHIM_WAKEEN 0x190
+
+#define SDW_SHIM_WAKEEN_ENABLE BIT(0)
+
+/* Wake Status */
#define SDW_SHIM_WAKESTS 0x192
+#define SDW_SHIM_WAKESTS_STATUS BIT(0)
+
/* AC Timing control */
#define SDW_SHIM_CTMCTL(x) (0x06E + 0x60 * (x))
@@ -86,9 +93,6 @@
#define SDW_SHIM_CTMCTL_DODS BIT(1)
#define SDW_SHIM_CTMCTL_DOAIS GENMASK(4, 3)
-#define SDW_SHIM_WAKEEN_ENABLE BIT(0)
-#define SDW_SHIM_WAKESTS_STATUS BIT(0)
-
/* Intel ALH Register definitions */
#define SDW_ALH_STRMZCFG(x) (0x000 + (0x4 * (x)))
#define SDW_ALH_NUM_STREAMS 64