diff options
| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2021-10-04 12:03:28 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-10-04 13:50:05 +0100 |
| commit | a2c27a61b4335344c1bacaade61e9b2dc6e12a76 (patch) | |
| tree | 16a6a684ef34f6aea25157e9e03b0c39741a910e /include/linux/phylink.h | |
| parent | 23b08260481ca552180130bbef0f3a60df4c092e (diff) | |
net: phylink: add phylink_set_10g_modes() helper
Add a helper for setting 10Gigabit modes, so we have one central
place that sets all appropriate 10G modes for a driver.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/phylink.h')
| -rw-r--r-- | include/linux/phylink.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 237291196ce2..f7b5ed06a815 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -484,6 +484,7 @@ int phylink_speed_up(struct phylink *pl); #define phylink_test(bm, mode) __phylink_do_bit(test_bit, bm, mode) void phylink_set_port_modes(unsigned long *bits); +void phylink_set_10g_modes(unsigned long *mask); void phylink_helper_basex_speed(struct phylink_link_state *state); void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, |