diff options
author | Marc Zyngier <maz@kernel.org> | 2019-12-24 11:10:34 +0000 |
---|---|---|
committer | Marc Zyngier <maz@kernel.org> | 2020-01-22 14:22:20 +0000 |
commit | 91bf6395f7b8614a5a9934a0ae9c8b5312d77b29 (patch) | |
tree | 115c5c5ff3e749fe7dbc6c23c00f520000aa02f9 /include/linux/irqchip | |
parent | d97c97baa214486cc3d64c996a2214475f6cc83c (diff) |
irqchip/gic-v4.1: Add VPE residency callback
Making a VPE resident on GICv4.1 is pretty simple, as it is just a
single write to the local redistributor. We just need extra information
about which groups to enable, which the KVM code will have to provide.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20191224111055.11836-12-maz@kernel.org
Diffstat (limited to 'include/linux/irqchip')
-rw-r--r-- | include/linux/irqchip/arm-gic-v3.h | 9 | ||||
-rw-r--r-- | include/linux/irqchip/arm-gic-v4.h | 5 |
2 files changed, 14 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 1f17181a9f7e..822dae6abf75 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -328,6 +328,15 @@ #define GICR_VPENDBASER_Valid (1ULL << 63) /* + * GICv4.1 VPENDBASER, used for VPE residency. On top of these fields, + * also use the above Valid, PendingLast and Dirty. + */ +#define GICR_VPENDBASER_4_1_DB (1ULL << 62) +#define GICR_VPENDBASER_4_1_VGRP0EN (1ULL << 59) +#define GICR_VPENDBASER_4_1_VGRP1EN (1ULL << 58) +#define GICR_VPENDBASER_4_1_VPEID GENMASK_ULL(15, 0) + +/* * ITS registers, offsets from ITS_base */ #define GITS_CTLR 0x0000 diff --git a/include/linux/irqchip/arm-gic-v4.h b/include/linux/irqchip/arm-gic-v4.h index 498e523085a7..d9c34968467a 100644 --- a/include/linux/irqchip/arm-gic-v4.h +++ b/include/linux/irqchip/arm-gic-v4.h @@ -100,6 +100,11 @@ struct its_cmd_info { union { struct its_vlpi_map *map; u8 config; + bool req_db; + struct { + bool g0en; + bool g1en; + }; }; }; |