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authorAapo Vienamo <avienamo@nvidia.com>2018-08-10 21:08:03 +0300
committerThierry Reding <treding@nvidia.com>2018-08-27 12:21:43 +0200
commitd9be10edf7d6040468f89824df0dfcfcbf3a693b (patch)
tree118a1a9d3e6178c544b38532f978604288602618 /include/dt-bindings/pinctrl
parent5b394b2ddf0347bef56e50c69a58773c94343ff3 (diff)
dt-bindings: Add Tegra PMC pad configuration bindings
Document the PMC pinctrl bindings for pad power state and signaling voltage configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt are modified as they both cover SoC generations for which these bindings apply. Add a header defining Tegra PMC pad voltage configurations. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings/pinctrl')
-rw-r--r--include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
new file mode 100644
index 000000000000..20f43404cac0
--- /dev/null
+++ b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * pinctrl-tegra-io-pad.h: Tegra I/O pad source voltage configuration constants
+ * pinctrl bindings.
+ *
+ * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Author: Aapo Vienamo <avienamo@nvidia.com>
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
+#define _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
+
+/* Voltage levels of the I/O pad's source rail */
+#define TEGRA_IO_PAD_VOLTAGE_1V8 0
+#define TEGRA_IO_PAD_VOLTAGE_3V3 1
+
+#endif