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authorVille Syrjälä <ville.syrjala@linux.intel.com>2018-11-14 23:07:21 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2018-11-28 21:51:51 +0200
commitce110ec311e9feae0905c24078146a2adbca877e (patch)
treecd44147e6dc8efab9e2d82f5775f0a972c2e8133 /drivers
parent0dd14be30d4c8401be9cd129df3b3ee238ea6f78 (diff)
drm/i915: Fix latency==0 handling for level 0 watermark on skl+
If the level 0 latency is 0 we can't do anything. Return an error rather than success. While this can't happen due to WaWmMemoryReadLatency, it can happen if the user clears out the level 0 latency via debugfs. v2: Clarify how how we can end here with zero level 0 latency (Matt) Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181114210729.16185-6-ville.syrjala@linux.intel.com Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 897a791662c5..d94de52a8a76 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4743,8 +4743,10 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
uint32_t min_disp_buf_needed;
- if (latency == 0 ||
- !intel_wm_plane_visible(cstate, intel_pstate)) {
+ if (latency == 0)
+ return level == 0 ? -EINVAL : 0;
+
+ if (!intel_wm_plane_visible(cstate, intel_pstate)) {
result->plane_en = false;
return 0;
}