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authorLucas De Marchi <lucas.demarchi@intel.com>2018-11-16 16:42:33 -0800
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-11-20 14:14:17 -0800
commit02c07b76af5a7b97f4af1d211503b53444193dbb (patch)
treeb1bb9388a511a8c8bdf45ab2c457b8ddeeb89cc9 /drivers
parentcab870b7fdf3c4be747d88de5248b28db7d4055e (diff)
drm/i915: allow to load DMC firmware on next gen
Before commit d8a5b7d79fb7 ("drm/i915/csr: keep max firmware size together with firmare name and version") it was possible to load the firmware for testing purposes via parameter. Let's use the size of the last known platform to recover that behavior. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181117004234.23437-1-lucas.demarchi@intel.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_csr.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index c1ca6596ff5c..b4476d891fa3 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -34,6 +34,8 @@
* low-power state and comes back to normal.
*/
+#define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE
+
#define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bin"
#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
#define ICL_CSR_MAX_FW_SIZE 0x6000
@@ -467,7 +469,10 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
*/
intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
- if (IS_ICELAKE(dev_priv)) {
+ if (INTEL_GEN(dev_priv) >= 12) {
+ /* Allow to load fw via parameter using the last known size */
+ csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
+ } else if (IS_ICELAKE(dev_priv)) {
csr->fw_path = ICL_CSR_PATH;
csr->required_version = ICL_CSR_VERSION_REQUIRED;
csr->max_fw_size = ICL_CSR_MAX_FW_SIZE;