diff options
| author | Archit Taneja <archit@ti.com> | 2011-12-12 11:47:41 +0530 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-01-02 08:51:27 +0200 |
| commit | 84309f16323b433045fba250f1e6bf8f26847ca5 (patch) | |
| tree | 3cee6e793fb04164d6c5991103622d2e4c39bbf1 /drivers/video/omap2 | |
| parent | 54540d41aaad0ed3245d3e99db014ab03a219c5a (diff) | |
OMAPDSS: DSI: Fix HSDIV related PLL info in dsi_dump_clocks()
The clock names of DSI_PLL_HSDIV_DISPC and DSI_PLL_HSDIV_DSI was made
dynamic based on the current value of DISPC and DSI FCLK sources. This
doesn't need to be done since we are just interested in the clock names,
and not the current clock sources for DISPC and DSI FCLKs.
Use only the generic and omap specific names for the DSI PLL's HSDIV
clocks.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2')
| -rw-r--r-- | drivers/video/omap2/dss/dsi.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 4dc98b692267..511ae2a7add8 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -1734,17 +1734,19 @@ static void dsi_dump_dsidev_clocks(struct platform_device *dsidev, seq_printf(s, "CLKIN4DDR\t%-16luregm %u\n", cinfo->clkin4ddr, cinfo->regm); - seq_printf(s, "%s (%s)\t%-16luregm_dispc %u\t(%s)\n", - dss_get_generic_clk_source_name(dispc_clk_src), - dss_feat_get_clk_source_name(dispc_clk_src), + seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16luregm_dispc %u\t(%s)\n", + dss_feat_get_clk_source_name(dsi_module == 0 ? + OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC : + OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC), cinfo->dsi_pll_hsdiv_dispc_clk, cinfo->regm_dispc, dispc_clk_src == OMAP_DSS_CLK_SRC_FCK ? "off" : "on"); - seq_printf(s, "%s (%s)\t%-16luregm_dsi %u\t(%s)\n", - dss_get_generic_clk_source_name(dsi_clk_src), - dss_feat_get_clk_source_name(dsi_clk_src), + seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16luregm_dsi %u\t(%s)\n", + dss_feat_get_clk_source_name(dsi_module == 0 ? + OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI : + OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI), cinfo->dsi_pll_hsdiv_dsi_clk, cinfo->regm_dsi, dsi_clk_src == OMAP_DSS_CLK_SRC_FCK ? |