diff options
author | Tony Luck <tony.luck@intel.com> | 2022-08-02 09:18:47 -0700 |
---|---|---|
committer | Borislav Petkov <bp@suse.de> | 2022-08-22 19:30:02 +0200 |
commit | d25c6948a6aad787d9fd64de6b5362c3f23cc8d0 (patch) | |
tree | c112d18e3a821c190445e977368056542c75c66a /drivers/ras | |
parent | 1c23f9e627a7b412978b4e852793c5e3c3efc555 (diff) |
RAS/CEC: Reduce offline page threshold for Intel systems
A large scale study of memory errors on Intel systems in data centers
showed that aggressively taking pages with corrected errors offline is
the best strategy of using corrected errors as a predictor of future
uncorrected errors.
Set the threshold to "2" on Intel systems. AMD guidance is that this is
not necessary for their systems.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Link: https://lore.kernel.org/r/20220607212015.175591-1-tony.luck@intel.com
Link: https://lore.kernel.org/r/YulOZ/Eso0bwUcC4@agluck-desk3.sc.intel.com
Diffstat (limited to 'drivers/ras')
-rw-r--r-- | drivers/ras/cec.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/ras/cec.c b/drivers/ras/cec.c index 42f2fc0bc8a9..321af498ee11 100644 --- a/drivers/ras/cec.c +++ b/drivers/ras/cec.c @@ -556,6 +556,14 @@ static int __init cec_init(void) if (ce_arr.disabled) return -ENODEV; + /* + * Intel systems may avoid uncorrectable errors + * if pages with corrected errors are aggressively + * taken offline. + */ + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) + action_threshold = 2; + ce_arr.array = (void *)get_zeroed_page(GFP_KERNEL); if (!ce_arr.array) { pr_err("Error allocating CE array page!\n"); |