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authorLinus Torvalds <torvalds@linux-foundation.org>2017-09-05 11:45:33 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-09-05 11:45:33 -0700
commitd16605c9128a498f9b8575b5c43be95c45dbcfab (patch)
tree2df1db4222b7e942ca47517fa4f5ab07b9b31b6e /drivers/pinctrl/pinconf.c
parentfe9e31383e9a271a9b404488704e00acd1747ee3 (diff)
parentac059e2aa01dcbbd7e0b2609abbef5790486fafe (diff)
Merge tag 'pinctrl-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "This is the big bulk of pin control changes for the v4.14 kernel. There are just a few bigger changes (new drivers mostly) and then a lot of small patches all over the place. Core changes: - Decision to wrap the sleep mode of the Spreadtrum and in the future others into a specially tagged state. The generic DT bindings and the new Spreadtrum driver conforms to this. Others should be moved over if possible. New drivers: - Spreadtrum SoCs especially the SC9860 SoC. - Storlink/Cortina Gemini 3512 and 3516 SoCs. New subdrivers: - Intel Denverton subdriver. - Intel Cannon Lake subdriver. - Intel Lewisburg subdriver. - Allwinner sunxi: R40 subdriver for A10. - Socionext uniphier PXs3 subdriver. - Rockchip RK3128 subdriver. - Renesas SH-PFC R8A77995 subdriver. Miscellaneous: - Qualcomm APQ8064 can handle general purpose clock muxing. - Mediatek MT7623 PCIe mux data fixed up. - Intel GPIO IRQs are disabled during suspend. - Several fixes and addtions to Renesas r8a7796. - Qualcomm SPMI GPIO supports dtest route and LV/MV subtype. - Input schmitt trigger support in Rockchip RV1108. - Aspeed G4 and G5 USB host/device pin control control added. - Qualcomm IPQ4019 has matured with a few missing pin groups and control bits put in place. - Lots of constification, this is the latest in cocinelle fixes" * tag 'pinctrl-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (147 commits) Revert "pinctrl: sunxi: Don't enforce bias disable (for now)" pinctrl: uniphier: fix members of rmii group for Pro4 pinctrl: Delete an error message pinctrl: core: Delete an error message pinctrl: intel: Read back TX buffer state pinctrl: rockchip: Add rv1108 recalculated iomux support pinctrl: intel: Decrease indentation in intel_gpio_set() pinctrl: rza1: Remove suffix from gpiochip label pinctrl: qcom: spmi-gpio: Correct power_source range check pinctrl: freescale: make mxs_regs const pinctrl: aspeed: Rework strap register write logic for the AST2500 pinctrl: rza1: off by one in rza1_parse_gpiochip() pinctrl: qcom: General Purpose clocks for apq8064 pinctrl: sprd: Add Spreadtrum pin control driver dt-bindings: pinctrl: Add DT bindings for Spreadtrum SC9860 pinctrl: Add sleep related state to indicate sleep related configs pinctrl: mediatek: update PCIe mux data for MT7623 pinctrl: intel: Add Intel Lewisburg GPIO support pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support pinctrl: aspeed: Fix ast2500 strap register write logic ...
Diffstat (limited to 'drivers/pinctrl/pinconf.c')
-rw-r--r--drivers/pinctrl/pinconf.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c
index 7fc417e4ae96..d3fe14394b73 100644
--- a/drivers/pinctrl/pinconf.c
+++ b/drivers/pinctrl/pinconf.c
@@ -37,7 +37,7 @@ int pinconf_check_ops(struct pinctrl_dev *pctldev)
return 0;
}
-int pinconf_validate_map(struct pinctrl_map const *map, int i)
+int pinconf_validate_map(const struct pinctrl_map *map, int i)
{
if (!map->data.configs.group_or_pin) {
pr_err("failed to register map %s (%d): no group/pin given\n",
@@ -106,7 +106,7 @@ unlock:
return ret;
}
-int pinconf_map_to_setting(struct pinctrl_map const *map,
+int pinconf_map_to_setting(const struct pinctrl_map *map,
struct pinctrl_setting *setting)
{
struct pinctrl_dev *pctldev = setting->pctldev;
@@ -143,11 +143,11 @@ int pinconf_map_to_setting(struct pinctrl_map const *map,
return 0;
}
-void pinconf_free_setting(struct pinctrl_setting const *setting)
+void pinconf_free_setting(const struct pinctrl_setting *setting)
{
}
-int pinconf_apply_setting(struct pinctrl_setting const *setting)
+int pinconf_apply_setting(const struct pinctrl_setting *setting)
{
struct pinctrl_dev *pctldev = setting->pctldev;
const struct pinconf_ops *ops = pctldev->desc->confops;
@@ -205,7 +205,7 @@ int pinconf_set_config(struct pinctrl_dev *pctldev, unsigned pin,
const struct pinconf_ops *ops;
ops = pctldev->desc->confops;
- if (!ops)
+ if (!ops || !ops->pin_config_set)
return -ENOTSUPP;
return ops->pin_config_set(pctldev, pin, configs, nconfigs);
@@ -235,7 +235,7 @@ static void pinconf_show_config(struct seq_file *s, struct pinctrl_dev *pctldev,
}
}
-void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map)
+void pinconf_show_map(struct seq_file *s, const struct pinctrl_map *map)
{
struct pinctrl_dev *pctldev;
@@ -259,7 +259,7 @@ void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map)
}
void pinconf_show_setting(struct seq_file *s,
- struct pinctrl_setting const *setting)
+ const struct pinctrl_setting *setting)
{
struct pinctrl_dev *pctldev = setting->pctldev;
const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;