diff options
author | Kishon Vijay Abraham I <kishon@ti.com> | 2016-07-04 18:07:25 +0530 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2016-07-04 18:07:25 +0530 |
commit | 6f7d2346cb9cc1f5b8a4881f06934f1cc50f02db (patch) | |
tree | 822ce55db89fbcedfeffa9970d9678d0eebd551a /drivers/phy | |
parent | 04e59a0211ff012ba60c00baca673482570784e9 (diff) | |
parent | 300eb0139cf27044c67f6005ff17b8434c7843f0 (diff) |
Merge tag 'phy-set-mode-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into next
Add new set_mode phy ops
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r-- | drivers/phy/phy-core.c | 15 | ||||
-rw-r--r-- | drivers/phy/phy-xgene.c | 4 |
2 files changed, 17 insertions, 2 deletions
diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c index b72e9a3b6429..8eca906b6e70 100644 --- a/drivers/phy/phy-core.c +++ b/drivers/phy/phy-core.c @@ -342,6 +342,21 @@ int phy_power_off(struct phy *phy) } EXPORT_SYMBOL_GPL(phy_power_off); +int phy_set_mode(struct phy *phy, enum phy_mode mode) +{ + int ret; + + if (!phy || !phy->ops->set_mode) + return 0; + + mutex_lock(&phy->mutex); + ret = phy->ops->set_mode(phy, mode); + mutex_unlock(&phy->mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(phy_set_mode); + /** * _of_phy_get() - lookup and obtain a reference to a phy by phandle * @np: device_node for which to get the phy diff --git a/drivers/phy/phy-xgene.c b/drivers/phy/phy-xgene.c index 385362e5b2f6..ae266e0c8368 100644 --- a/drivers/phy/phy-xgene.c +++ b/drivers/phy/phy-xgene.c @@ -518,7 +518,7 @@ enum clk_type_t { CLK_INT_SING = 2, /* Internal single ended */ }; -enum phy_mode { +enum xgene_phy_mode { MODE_SATA = 0, /* List them for simple reference */ MODE_SGMII = 1, MODE_PCIE = 2, @@ -542,7 +542,7 @@ struct xgene_sata_override_param { struct xgene_phy_ctx { struct device *dev; struct phy *phy; - enum phy_mode mode; /* Mode of operation */ + enum xgene_phy_mode mode; /* Mode of operation */ enum clk_type_t clk_type; /* Input clock selection */ void __iomem *sds_base; /* PHY CSR base addr */ struct clk *clk; /* Optional clock */ |