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authorThierry Reding <treding@nvidia.com>2019-04-25 17:34:43 +0200
committerKishon Vijay Abraham I <kishon@ti.com>2019-06-12 15:35:44 +0530
commitaa5452f54b9f21213364baed25a0f8241aa09050 (patch)
treeeffc4946ac5766d717fc29d0bb9cb487fc2c4177 /drivers/phy/tegra
parentf40043b368ae787837ef659728f0b08bd34f5317 (diff)
phy: tegra: xusb: Add Tegra124 PLL power supplies
The Tegra124 SoC has four inputs that consume power in order to supply the PLLs that drive the various USB, PCI and SATA pads. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy/tegra')
-rw-r--r--drivers/phy/tegra/xusb-tegra124.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/phy/tegra/xusb-tegra124.c b/drivers/phy/tegra/xusb-tegra124.c
index c45cbedc6634..254592c47b00 100644
--- a/drivers/phy/tegra/xusb-tegra124.c
+++ b/drivers/phy/tegra/xusb-tegra124.c
@@ -1721,6 +1721,13 @@ static const struct tegra_xusb_padctl_ops tegra124_xusb_padctl_ops = {
.hsic_set_idle = tegra124_hsic_set_idle,
};
+static const char * const tegra124_xusb_padctl_supply_names[] = {
+ "avdd-pll-utmip",
+ "avdd-pll-erefe",
+ "avdd-pex-pll",
+ "hvdd-pex-pll-e",
+};
+
const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc = {
.num_pads = ARRAY_SIZE(tegra124_pads),
.pads = tegra124_pads,
@@ -1743,6 +1750,8 @@ const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc = {
},
},
.ops = &tegra124_xusb_padctl_ops,
+ .supply_names = tegra124_xusb_padctl_supply_names,
+ .num_supplies = ARRAY_SIZE(tegra124_xusb_padctl_supply_names),
};
EXPORT_SYMBOL_GPL(tegra124_xusb_padctl_soc);