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authorBjorn Helgaas <bhelgaas@google.com>2024-03-12 12:14:24 -0500
committerBjorn Helgaas <bhelgaas@google.com>2024-03-12 12:14:24 -0500
commitc5176fd9e63aa8de2255ba95808badefbc4c9387 (patch)
tree114fa94d46415b7c8a8ed7af7f27c4d4e6438018 /drivers/pci/quirks.c
parentb8de187056f10f31739cad3d7b66677415f79883 (diff)
parent29a43dc130ce65d365a8ea9e1cc4bc51005a353e (diff)
Merge branch 'pci/virtualization'
- Avoid Secondary Bus Reset on the LSI / Agere FW643, which allows it to be assigned to VMs with VFIO, at the cost of leaking FW643 state between VMs (Edmund Raile) * pci/virtualization: PCI: Mark LSI FW643 to avoid bus reset
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index eff7f5df08e2..bf4833221816 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3766,6 +3766,14 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);
/*
+ * Apparently the LSI / Agere FW643 can't recover after a Secondary Bus
+ * Reset and requires a power-off or suspend/resume and rescan. Prevent
+ * use of that reset.
+ */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5900, quirk_no_bus_reset);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5901, quirk_no_bus_reset);
+
+/*
* Some TI KeyStone C667X devices do not support bus/hot reset. The PCIESS
* automatically disables LTSSM when Secondary Bus Reset is received and
* the device stops working. Prevent bus reset for these devices. With