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authorBiju Das <biju.das.jz@bp.renesas.com>2023-03-30 12:16:28 +0100
committerLee Jones <lee@kernel.org>2023-04-26 11:40:34 +0100
commit654c293e1687b31819f9bf1ac71b5a85a8053210 (patch)
tree0abce928409e1c44d7964c540f5ec76d6b576306 /drivers/mfd/Makefile
parent0a9d6b54297e216199cbfd08c5e6a35cce152477 (diff)
mfd: Add Renesas RZ/G2L MTU3a core driver
The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in the Renesas RZ/G2L family SoCs. It consists of eight 16-bit timer channels and one 32-bit timer channel. It supports the following functions - Counter - Timer - PWM The 8/16/32 bit registers are mixed in each channel. Add MTU3a core driver for RZ/G2L SoC. The core driver shares the clk and channel register access for the other child devices like Counter, PWM and Clock event. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230330111632.169434-3-biju.das.jz@bp.renesas.com
Diffstat (limited to 'drivers/mfd/Makefile')
-rw-r--r--drivers/mfd/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 2f6c89d1e277..1d2392f06f78 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -174,6 +174,7 @@ pcf50633-objs := pcf50633-core.o pcf50633-irq.o
obj-$(CONFIG_MFD_PCF50633) += pcf50633.o
obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o
obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
+obj-$(CONFIG_RZ_MTU3) += rz-mtu3.o
obj-$(CONFIG_ABX500_CORE) += abx500-core.o
obj-$(CONFIG_MFD_DB8500_PRCMU) += db8500-prcmu.o
# ab8500-core need to come after db8500-prcmu (which provides the channel)