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authorAlex Deucher <alexander.deucher@amd.com>2012-03-20 17:18:30 -0400
committerDave Airlie <airlied@redhat.com>2012-03-21 06:55:56 +0000
commitca7db22bc59ced2f180f37db8470140225d75860 (patch)
treee3cd581df6dd00c4b62a074b7e9942ee884a3af2 /drivers/gpu/drm
parent5d7486c77d44cb26049f599fdfa46bc548ea5537 (diff)
drm/radeon/kms: DCE6.1 watermark updates for TN
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c2
-rw-r--r--drivers/gpu/drm/radeon/si.c8
2 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 466db4115cd5..6c2b666c8ffc 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -581,7 +581,7 @@ static u32 evergreen_line_buffer_adjust(struct radeon_device *rdev,
return 0;
}
-static u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev)
+u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev)
{
u32 tmp = RREG32(MC_SHARED_CHMAP);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 4c0d8d251dd0..d773ea9c30f7 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -60,6 +60,7 @@ extern void r600_ih_ring_fini(struct radeon_device *rdev);
extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev);
extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
+extern u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev);
/* get temperature in millidegrees */
int si_get_temp(struct radeon_device *rdev)
@@ -449,7 +450,7 @@ static u32 dce6_line_buffer_adjust(struct radeon_device *rdev,
return 0;
}
-static u32 dce6_get_number_of_dram_channels(struct radeon_device *rdev)
+static u32 si_get_number_of_dram_channels(struct radeon_device *rdev)
{
u32 tmp = RREG32(MC_SHARED_CHMAP);
@@ -766,7 +767,10 @@ static void dce6_program_watermarks(struct radeon_device *rdev,
wm.vtaps = 2;
wm.bytes_per_pixel = 4; /* XXX: get this from fb config */
wm.lb_size = lb_size;
- wm.dram_channels = dce6_get_number_of_dram_channels(rdev);
+ if (rdev->family == CHIP_ARUBA)
+ wm.dram_channels = evergreen_get_number_of_dram_channels(rdev);
+ else
+ wm.dram_channels = si_get_number_of_dram_channels(rdev);
wm.num_heads = num_heads;
/* set for high clocks */