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authorChris Wilson <chris@chris-wilson.co.uk>2016-08-18 17:16:47 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-18 22:36:44 +0100
commit43394c7d0d36716edd92e482ec68bec6b82f2982 (patch)
tree624836eb45684c3b06890854421b063a3aba8270 /drivers/gpu/drm/i915/i915_cmd_parser.c
parent31a39207f04a37324d70ff5665fd19d3a75b39c1 (diff)
drm/i915: Extract i915_gem_obj_prepare_shmem_write()
This is a companion to i915_gem_obj_prepare_shmem_read() that prepares the backing storage for direct writes. It first serialises with the GPU, pins the backing storage and then indicates what clfushes are required in order for the writes to be coherent. Whilst here, fix support for ancient CPUs without clflush for which we cannot do the GTT+clflush tricks. v2: Add i915_gem_obj_finish_shmem_access() for symmetry Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20160818161718.27187-8-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_cmd_parser.c')
-rw-r--r--drivers/gpu/drm/i915/i915_cmd_parser.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 1db829c8b912..e586e15e172f 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -973,7 +973,7 @@ static u32 *copy_batch(struct drm_i915_gem_object *dest_obj,
u32 batch_start_offset,
u32 batch_len)
{
- int needs_clflush = 0;
+ unsigned int needs_clflush;
void *src_base, *src;
void *dst = NULL;
int ret;
@@ -1020,7 +1020,7 @@ static u32 *copy_batch(struct drm_i915_gem_object *dest_obj,
unmap_src:
vunmap(src_base);
unpin_src:
- i915_gem_object_unpin_pages(src_obj);
+ i915_gem_obj_finish_shmem_access(src_obj);
return ret ? ERR_PTR(ret) : dst;
}