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authorDharma Balasubiramani <dharma.b@microchip.com>2023-09-05 15:38:35 +0530
committerWilliam Breathitt Gray <william.gray@linaro.org>2023-09-05 12:25:14 -0400
commitdf8fdd01c98b99d04915c04f3a5ce73f55456b7c (patch)
tree84e559ff889c6a1c008394f86649dcd10f4ee2d5 /drivers/counter
parent3170256d7bc1ef81587caf4b83573eb1f5bb4fb6 (diff)
counter: microchip-tcb-capture: Fix the use of internal GCLK logic
As per the datasheet, the clock selection Bits 2:0 – TCCLKS[2:0] should be set to 0 while using the internal GCLK (TIMER_CLOCK1). Fixes: 106b104137fd ("counter: Add microchip TCB capture counter") Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Link: https://lore.kernel.org/r/20230905100835.315024-1-dharma.b@microchip.com Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Diffstat (limited to 'drivers/counter')
-rw-r--r--drivers/counter/microchip-tcb-capture.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c
index e2d1dc6ca668..c7af13aca36c 100644
--- a/drivers/counter/microchip-tcb-capture.c
+++ b/drivers/counter/microchip-tcb-capture.c
@@ -98,7 +98,7 @@ static int mchp_tc_count_function_write(struct counter_device *counter,
priv->qdec_mode = 0;
/* Set highest rate based on whether soc has gclk or not */
bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN);
- if (priv->tc_cfg->has_gclk)
+ if (!priv->tc_cfg->has_gclk)
cmr |= ATMEL_TC_TIMER_CLOCK2;
else
cmr |= ATMEL_TC_TIMER_CLOCK1;