diff options
| author | Bintian Wang <bintian.wang@huawei.com> | 2015-05-29 10:08:38 +0800 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2015-06-03 15:12:25 -0700 |
| commit | 72ea48610d43c59507d9ad39083d40085400ba12 (patch) | |
| tree | 826b1a5073246280adf5d90dbbecf492848af009 /drivers/clk/Kconfig | |
| parent | 2a40a2ea109269def06f991f771c2bf2f6c0f396 (diff) | |
clk: hi6220: Clock driver support for Hisilicon hi6220 SoC
Add clock drivers for hi6220 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.
We add one divider clock for hi6220 because the divider in hi6220
also has a mask bit but it doesnot obey the rule defined by flag
"CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by
left shift fixed bits (e.g. 16 bits), so we add this divider clock
to handle it.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/Kconfig')
| -rw-r--r-- | drivers/clk/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 9897f353bf1a..8ec04156717b 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -150,6 +150,7 @@ config COMMON_CLK_CDCE706 ---help--- This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. +source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/qcom/Kconfig" endmenu |