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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-06-12 16:53:38 +1000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-06-12 16:53:38 +1000
commitbc47ab0241c7c86da4f5e5f82fbca7d45387c18d (patch)
treeb9c33ae8b6de43e44cc5fcbaa3e4a15f18a5ed42 /arch/sh/include/cpu-sh4/cpu/sh7722.h
parent37f9ef553bed630957e025504cdcbc76f5de49d5 (diff)
parent8ebf975608aaebd7feb33d77f07ba21a6380e086 (diff)
Merge commit 'origin/master' into next
Manual merge of: arch/powerpc/kernel/asm-offsets.c
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu/sh7722.h')
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7722.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h
index 4b3096f5307b..738ea43c5038 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7722.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h
@@ -1,6 +1,20 @@
#ifndef __ASM_SH7722_H__
#define __ASM_SH7722_H__
+/* Boot Mode Pins:
+ *
+ * MD0: CPG - Clock Mode 0->3
+ * MD1: CPG - Clock Mode 0->3
+ * MD2: CPG - Reserved (L: Normal operation)
+ * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
+ * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
+ * MD8: Test Mode
+ */
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_Pxx - GPIO mapped to real I/O pin on CPU
+ */
enum {
/* PTA */
GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,