diff options
author | Joel Stanley <joel@jms.id.au> | 2022-09-30 16:20:12 +0930 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2022-11-24 23:31:48 +1100 |
commit | 5825603f67bc5ff445a1847302884154f0afa627 (patch) | |
tree | 60959d66153305bfbfcf08b6bee68338fa11d7ae /arch/powerpc/boot | |
parent | 0b4721815c5328e08c3acdee4a53890e012d830b (diff) |
powerpc/microwatt: Add litesd
This is the register layout of the litesd peripheral for the fusesoc
based Microwatt SoC.
It requires a description of the system clock, which is hardcoded to
100MHz.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220930065012.2860577-1-joel@jms.id.au
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r-- | arch/powerpc/boot/dts/microwatt.dts | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/microwatt.dts b/arch/powerpc/boot/dts/microwatt.dts index b69db1d275cd..269e930b3b0b 100644 --- a/arch/powerpc/boot/dts/microwatt.dts +++ b/arch/powerpc/boot/dts/microwatt.dts @@ -21,6 +21,14 @@ reg = <0x00000000 0x00000000 0x00000000 0x10000000>; }; + clocks { + sys_clk: litex_sys_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; + }; + cpus { #size-cells = <0x00>; #address-cells = <0x01>; @@ -141,6 +149,20 @@ litex,slot-size = <0x800>; interrupts = <0x11 0x1>; }; + + mmc@8040000 { + compatible = "litex,mmc"; + reg = <0x8042800 0x800 + 0x8041000 0x800 + 0x8040800 0x800 + 0x8042000 0x800 + 0x8041800 0x800>; + reg-names = "phy", "core", "reader", "writer", "irq"; + bus-width = <4>; + interrupts = <0x13 1>; + cap-sd-highspeed; + clocks = <&sys_clk>; + }; }; chosen { |