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authorChristian Marangi <ansuelsmth@gmail.com>2024-10-01 17:23:59 +0200
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2024-10-30 23:45:53 +0100
commit7c43938f6581d08bb7a79286b996a32c0945bc49 (patch)
treee0dc8451bbf0d04ec4b54c65b4e390a33333d8f4 /arch/mips
parent6f14293257309a02a6d451e80e4ef1d78560479e (diff)
mips: bmips: bcm6358/6368: define required brcm,bmips-cbr-reg
For the bcm6358/6368 SoC the brcm,bmips-cbr-reg due to bootloader misconfiguration or HW bug from running the system from TP1. A workaround is now present to handle broken system that suffer from this bug hence add the now required property. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202409251520.pE12GzHd-lkp@intel.com/ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/boot/dts/brcm/bcm6358.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm6368.dtsi1
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index 777c4379ed03..5e487f66c343 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -13,6 +13,7 @@
#size-cells = <0>;
mips-hpt-frequency = <150000000>;
+ brcm,bmips-cbr-reg = <0xff400000>;
cpu@0 {
compatible = "brcm,bmips4350";
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index fc15e200877d..087f3295a14b 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -13,6 +13,7 @@
#size-cells = <0>;
mips-hpt-frequency = <200000000>;
+ brcm,bmips-cbr-reg = <0xff400000>;
cpu@0 {
compatible = "brcm,bmips4350";