diff options
| author | Vladimir Zapolskiy <vz@mleia.com> | 2015-10-18 00:41:06 +0300 |
|---|---|---|
| committer | Vladimir Zapolskiy <vz@mleia.com> | 2015-11-18 18:01:24 +0200 |
| commit | c1aa70072cfb95d28bd5b63848f9b37e57273f18 (patch) | |
| tree | 9f4d7bf1060d71190610dbbcf4bdf24fa730acda /arch/arm | |
| parent | f83ee67fcf8d743e7fbcb08c70fcd32c253bb2fa (diff) | |
arm: dts: lpc32xx: add device nodes for standard timers
NXP LPC32xx SoCs have 6 standard timers, add device nodes to describe
them.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/lpc32xx.dtsi | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index a595a4b772d4..ba91b203c8c1 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -271,11 +271,31 @@ #gpio-cells = <3>; /* bank, pin, flags */ }; + timer4: timer@4002C000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x4002C000 0x1000>; + interrupts = <0x3 0>; + status = "disabled"; + }; + + timer5: timer@40030000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40030000 0x1000>; + interrupts = <0x4 0>; + status = "disabled"; + }; + watchdog: watchdog@4003C000 { compatible = "nxp,pnx4008-wdt"; reg = <0x4003C000 0x1000>; }; + timer0: timer@40044000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40044000 0x1000>; + interrupts = <0x10 0>; + }; + /* * TSC vs. ADC: Since those two share the same * hardware, you need to choose from one of the @@ -297,6 +317,12 @@ status = "disabled"; }; + timer1: timer@4004C000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x4004C000 0x1000>; + interrupts = <0x11 0>; + }; + key: key@40050000 { compatible = "nxp,lpc3220-key"; reg = <0x40050000 0x1000>; @@ -304,6 +330,13 @@ status = "disabled"; }; + timer2: timer@40058000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40058000 0x1000>; + interrupts = <0x12 0>; + status = "disabled"; + }; + pwm1: pwm@4005C000 { compatible = "nxp,lpc3220-pwm"; reg = <0x4005C000 0x4>; @@ -315,6 +348,13 @@ reg = <0x4005C004 0x4>; status = "disabled"; }; + + timer3: timer@40060000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40060000 0x1000>; + interrupts = <0x13 0>; + status = "disabled"; + }; }; }; }; |