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authorOlof Johansson <olof@lixom.net>2019-01-12 22:03:59 -0800
committerOlof Johansson <olof@lixom.net>2019-01-12 22:03:59 -0800
commit56acb3ef76177a5aabe6613bf27348d34f1e65c0 (patch)
tree346b9f684e71cb93d573b6e973799819b27b69b9 /arch/arm64
parent2ec472edcd72947b031ec998d646dd7a6be958dd (diff)
parentb5f034845e70916fd33e172fad5ad530a29c10ab (diff)
Merge tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 5.0 They are all device tree fixes which also worth being in stable: - Reserve PSCI area on Armada 7K/8K preventing the kernel accessing this area and crashing while doing it. - Use correct PCIe reset signal on MACCHIATOBin (Armada 8040 based) - Fix polarity of GPIO fan line D-Link DNS NASes(kikwood based) * tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu: ARM: dts: kirkwood: Fix polarity of GPIO fan lines arm64: dts: marvell: mcbin: fix PCIe reset signal arm64: dts: marvell: armada-ap806: reserve PSCI area Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806.dtsi17
2 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
index 29ea7e81ec4c..329f8ceeebea 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
@@ -183,7 +183,7 @@
pinctrl-0 = <&cp0_pcie_pins>;
num-lanes = <4>;
num-viewport = <8>;
- reset-gpio = <&cp0_gpio1 20 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 7d94c1fa592a..7f799cb5668e 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -28,6 +28,23 @@
method = "smc";
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /*
+ * This area matches the mapping done with a
+ * mainline U-Boot, and should be updated by the
+ * bootloader.
+ */
+
+ psci-area@4000000 {
+ reg = <0x0 0x4000000 0x0 0x200000>;
+ no-map;
+ };
+ };
+
ap806 {
#address-cells = <2>;
#size-cells = <2>;