diff options
author | Matthias Kaehlcke <mka@chromium.org> | 2017-06-23 10:07:36 -0700 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2017-07-16 17:09:37 +0200 |
commit | 6f07176fc36c0ad51877a07c99bb04f29d96aced (patch) | |
tree | 6cc19e106d6985015cb05150e9ebb12037d2b24a /arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts | |
parent | 2fb634de8d318a100093e45057923bdfaa7facb1 (diff) |
arm64: dts: rockchip: Use vctrl regulators for dynamic CPU voltages on Gru/Kevin
The Gru device tree currently contains entries for the regulators
ppvar_bigcpu, ppvar_litcpu, ppvar_gpu and ppvar_centerlogic; however,
the regulators have not been enabled, due to the lack of binding and driver
support for keeping the over-voltage protection (OVP) at bay and
preventing unintended regulator shutdowns on voltage downshifts.
Now, the vctrl regulator driver has been merged, along with new bindings
for asymmetric settling time. The driver is OVP aware, it splits larger
voltage decreases in multiple steps when necessary and adds required
delays.
This change renames each of the aforementioned regulators to
<orig_name>_pwm and adds a new vctrl regulator named <orig_name>.
The vctrl regulators use the voltage of their corresponding PWM regulator
as control voltage. The OVP related values are empirical and stem from
the Chrome OS kernel tree.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
[fixed node names and parent supplies of gpu and centerlogic]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts index 1cb4af78b2b1..a3d3cea7dc4f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts @@ -264,24 +264,48 @@ ap_i2c_dig: &i2c2 { }; }; +&ppvar_bigcpu_pwm { + regulator-min-microvolt = <798674>; + regulator-max-microvolt = <1302172>; +}; + &ppvar_bigcpu { regulator-min-microvolt = <798674>; regulator-max-microvolt = <1302172>; + ctrl-voltage-range = <798674 1302172>; +}; + +&ppvar_litcpu_pwm { + regulator-min-microvolt = <799065>; + regulator-max-microvolt = <1303738>; }; &ppvar_litcpu { regulator-min-microvolt = <799065>; regulator-max-microvolt = <1303738>; + ctrl-voltage-range = <799065 1303738>; +}; + +&ppvar_gpu_pwm { + regulator-min-microvolt = <785782>; + regulator-max-microvolt = <1217729>; }; &ppvar_gpu { regulator-min-microvolt = <785782>; regulator-max-microvolt = <1217729>; + ctrl-voltage-range = <785782 1217729>; +}; + +&ppvar_centerlogic_pwm { + regulator-min-microvolt = <800069>; + regulator-max-microvolt = <1049692>; }; &ppvar_centerlogic { regulator-min-microvolt = <800069>; regulator-max-microvolt = <1049692>; + ctrl-voltage-range = <800069 1049692>; }; &saradc { |