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authorYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>2016-03-04 05:23:30 -0500
committerFlorian Fainelli <f.fainelli@gmail.com>2016-05-31 11:00:26 -0700
commit5f2fb24141b948a3d91f249c7416262362496e54 (patch)
treea3d9f9df28aed30a1d10d1e7d688466ad4b818f3 /arch/arm64/boot/dts/broadcom/ns2.dtsi
parent97b1504a30b3b88ffb6a0502c01bf0868a1704c8 (diff)
arm64: dts: Enable GPIO for Broadcom NS2 SoC
This enables the GPIO support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/broadcom/ns2.dtsi')
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2.dtsi19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 4e48b86a9e92..788ed8f9f2bc 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -258,6 +258,15 @@
<0x660009b0 0x40>;
};
+ gpio_aon: gpio@65024800 {
+ compatible = "brcm,iproc-gpio";
+ reg = <0x65024800 0x50>,
+ <0x65024008 0x18>;
+ ngpios = <6>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
gic: interrupt-controller@65210000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@@ -328,6 +337,16 @@
clock-names = "wdogclk", "apb_pclk";
};
+ gpio_g: gpio@660a0000 {
+ compatible = "brcm,iproc-gpio";
+ reg = <0x660a0000 0x50>;
+ ngpios = <32>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
i2c1: i2c@660b0000 {
compatible = "brcm,iproc-i2c";
reg = <0x660b0000 0x100>;