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authorLinus Torvalds <torvalds@linux-foundation.org>2022-05-26 10:43:09 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2022-05-26 10:43:09 -0700
commitecf0aa5317b0ad6bb015128a5b763c954fd58708 (patch)
tree2bf6f0eb2ad2922bc644b72be2a75ac0df6e4403 /arch/arm/mach-ep93xx/irqs.h
parenta0439cf4eca05fe562f19ece4b6761852d911adb (diff)
parent1a23accae82d780b5d5de6254d32c270aeb7f664 (diff)
Merge tag 'arm-multiplatform-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARMv4T/v5 multiplatform support from Arnd Bergmann: "This series has been 12 years in the making, it mostly finishes the work that was started with the founding of Linaro to clean up platform support in the kernel. The largest change here is a cleanup of the omap1 platform, which is the final ARM machine type to get converted to the common-clk subsystem. All the omap1 specific drivers are now made independent of the mach/*.h headers to allow the platform to be part of a generic ARMv4/v5 multiplatform kernel. The last bit that enables this support is still missing here while we wait for some last dependencies to make it into the mainline kernel through other subsystems. The s3c24xx, ixp4xx, iop32x, ep93xx and dove platforms were all almost at the point of allowing multiplatform kernels, this work gets completed here along with a few additional cleanup. At the same time, the s3c24xx and s3c64xx are now deprecated and expected to get removed in the future. The PXA and OMAP1 bits are in a separate branch because of dependencies. Once both branches are merged, only the three Intel StrongARM platforms (RiscPC, Footbridge/NetWinder and StrongARM1100) need separate kernels, and there are no plans to include these" * tag 'arm-multiplatform-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (61 commits) ARM: ixp4xx: Consolidate Kconfig fixing issue ARM: versatile: Add missing of_node_put in dcscb_init ARM: config: Refresh IXP4xx config after multiplatform ARM: omap1: add back omap_set_dma_priority() stub ARM: omap: fix missing declaration warnings ARM: omap: fix address space warnings from sparse ARM: spear: remove include/mach/ subdirectory ARM: davinci: remove include/mach/ subdirectory ARM: omap2: remove include/mach/ subdirectory integrator: remove empty ap_init_early() ARM: s3c: fix include path MAINTAINERS: omap1: Add Janusz as an additional maintainer ARM: omap1: htc_herald: fix typos in comments ARM: OMAP1: fix typos in comments ARM: OMAP1: clock: Remove noop code ARM: OMAP1: clock: Remove unused code ARM: OMAP1: clock: Fix UART rate reporting algorithm ARM: OMAP1: clock: Fix early UART rate issues ARM: OMAP1: Prepare for conversion of OMAP1 clocks to CCF ARM: omap1: fix build with no SoC selected ...
Diffstat (limited to 'arch/arm/mach-ep93xx/irqs.h')
-rw-r--r--arch/arm/mach-ep93xx/irqs.h76
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/irqs.h b/arch/arm/mach-ep93xx/irqs.h
new file mode 100644
index 000000000000..353201b90c66
--- /dev/null
+++ b/arch/arm/mach-ep93xx/irqs.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+#define IRQ_EP93XX_VIC0 1
+
+#define IRQ_EP93XX_COMMRX (IRQ_EP93XX_VIC0 + 2)
+#define IRQ_EP93XX_COMMTX (IRQ_EP93XX_VIC0 + 3)
+#define IRQ_EP93XX_TIMER1 (IRQ_EP93XX_VIC0 + 4)
+#define IRQ_EP93XX_TIMER2 (IRQ_EP93XX_VIC0 + 5)
+#define IRQ_EP93XX_AACINTR (IRQ_EP93XX_VIC0 + 6)
+#define IRQ_EP93XX_DMAM2P0 (IRQ_EP93XX_VIC0 + 7)
+#define IRQ_EP93XX_DMAM2P1 (IRQ_EP93XX_VIC0 + 8)
+#define IRQ_EP93XX_DMAM2P2 (IRQ_EP93XX_VIC0 + 9)
+#define IRQ_EP93XX_DMAM2P3 (IRQ_EP93XX_VIC0 + 10)
+#define IRQ_EP93XX_DMAM2P4 (IRQ_EP93XX_VIC0 + 11)
+#define IRQ_EP93XX_DMAM2P5 (IRQ_EP93XX_VIC0 + 12)
+#define IRQ_EP93XX_DMAM2P6 (IRQ_EP93XX_VIC0 + 13)
+#define IRQ_EP93XX_DMAM2P7 (IRQ_EP93XX_VIC0 + 14)
+#define IRQ_EP93XX_DMAM2P8 (IRQ_EP93XX_VIC0 + 15)
+#define IRQ_EP93XX_DMAM2P9 (IRQ_EP93XX_VIC0 + 16)
+#define IRQ_EP93XX_DMAM2M0 (IRQ_EP93XX_VIC0 + 17)
+#define IRQ_EP93XX_DMAM2M1 (IRQ_EP93XX_VIC0 + 18)
+#define IRQ_EP93XX_GPIO0MUX (IRQ_EP93XX_VIC0 + 19)
+#define IRQ_EP93XX_GPIO1MUX (IRQ_EP93XX_VIC0 + 20)
+#define IRQ_EP93XX_GPIO2MUX (IRQ_EP93XX_VIC0 + 21)
+#define IRQ_EP93XX_GPIO3MUX (IRQ_EP93XX_VIC0 + 22)
+#define IRQ_EP93XX_UART1RX (IRQ_EP93XX_VIC0 + 23)
+#define IRQ_EP93XX_UART1TX (IRQ_EP93XX_VIC0 + 24)
+#define IRQ_EP93XX_UART2RX (IRQ_EP93XX_VIC0 + 25)
+#define IRQ_EP93XX_UART2TX (IRQ_EP93XX_VIC0 + 26)
+#define IRQ_EP93XX_UART3RX (IRQ_EP93XX_VIC0 + 27)
+#define IRQ_EP93XX_UART3TX (IRQ_EP93XX_VIC0 + 28)
+#define IRQ_EP93XX_KEY (IRQ_EP93XX_VIC0 + 29)
+#define IRQ_EP93XX_TOUCH (IRQ_EP93XX_VIC0 + 30)
+#define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc
+
+#define IRQ_EP93XX_VIC1 (IRQ_EP93XX_VIC0 + 32)
+
+#define IRQ_EP93XX_EXT0 (IRQ_EP93XX_VIC1 + 0)
+#define IRQ_EP93XX_EXT1 (IRQ_EP93XX_VIC1 + 1)
+#define IRQ_EP93XX_EXT2 (IRQ_EP93XX_VIC1 + 2)
+#define IRQ_EP93XX_64HZ (IRQ_EP93XX_VIC1 + 3)
+#define IRQ_EP93XX_WATCHDOG (IRQ_EP93XX_VIC1 + 4)
+#define IRQ_EP93XX_RTC (IRQ_EP93XX_VIC1 + 5)
+#define IRQ_EP93XX_IRDA (IRQ_EP93XX_VIC1 + 6)
+#define IRQ_EP93XX_ETHERNET (IRQ_EP93XX_VIC1 + 7)
+#define IRQ_EP93XX_EXT3 (IRQ_EP93XX_VIC1 + 8)
+#define IRQ_EP93XX_PROG (IRQ_EP93XX_VIC1 + 9)
+#define IRQ_EP93XX_1HZ (IRQ_EP93XX_VIC1 + 10)
+#define IRQ_EP93XX_VSYNC (IRQ_EP93XX_VIC1 + 11)
+#define IRQ_EP93XX_VIDEO_FIFO (IRQ_EP93XX_VIC1 + 12)
+#define IRQ_EP93XX_SSP1RX (IRQ_EP93XX_VIC1 + 13)
+#define IRQ_EP93XX_SSP1TX (IRQ_EP93XX_VIC1 + 14)
+#define IRQ_EP93XX_GPIO4MUX (IRQ_EP93XX_VIC1 + 15)
+#define IRQ_EP93XX_GPIO5MUX (IRQ_EP93XX_VIC1 + 16)
+#define IRQ_EP93XX_GPIO6MUX (IRQ_EP93XX_VIC1 + 17)
+#define IRQ_EP93XX_GPIO7MUX (IRQ_EP93XX_VIC1 + 18)
+#define IRQ_EP93XX_TIMER3 (IRQ_EP93XX_VIC1 + 19)
+#define IRQ_EP93XX_UART1 (IRQ_EP93XX_VIC1 + 20)
+#define IRQ_EP93XX_SSP (IRQ_EP93XX_VIC1 + 21)
+#define IRQ_EP93XX_UART2 (IRQ_EP93XX_VIC1 + 22)
+#define IRQ_EP93XX_UART3 (IRQ_EP93XX_VIC1 + 23)
+#define IRQ_EP93XX_USB (IRQ_EP93XX_VIC1 + 24)
+#define IRQ_EP93XX_ETHERNET_PME (IRQ_EP93XX_VIC1 + 25)
+#define IRQ_EP93XX_DSP (IRQ_EP93XX_VIC1 + 26)
+#define IRQ_EP93XX_GPIO_AB (IRQ_EP93XX_VIC1 + 27)
+#define IRQ_EP93XX_SAI (IRQ_EP93XX_VIC1 + 28)
+#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
+
+#define NR_EP93XX_IRQS (IRQ_EP93XX_VIC1 + 32 + 24)
+
+#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
+#define EP93XX_BOARD_IRQS 32
+
+#endif