summaryrefslogtreecommitdiff
path: root/arch/arm/boot
diff options
context:
space:
mode:
authorJon Mason <jon.mason@broadcom.com>2017-07-31 17:54:22 -0400
committerFlorian Fainelli <f.fainelli@gmail.com>2017-08-07 10:32:19 -0700
commit2c5b8512c5b6812c7b4547f93028f938c3b033be (patch)
tree22c98a7529af828dd2961a4b47658c027775b83b /arch/arm/boot
parent56e2ff0346a39b8f0433456b7ec3dd31038d2ec1 (diff)
ARM: dts: NSP: Rearrage USB entries
The rest of the DTSI file is in incrementing addresses, but the USB OHCI/ECHI entries are out of sequence. Move them to put them in the proper place. Signed-off-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/bcm-nsp.dtsi32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index c82313a677d9..9feb3689d191 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -302,6 +302,22 @@
#size-cells = <0>;
};
+ ehci0: usb@2a000 {
+ compatible = "generic-ehci";
+ reg = <0x2a000 0x100>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
+ status = "disabled";
+ };
+
+ ohci0: usb@2b000 {
+ compatible = "generic-ohci";
+ reg = <0x2b000 0x100>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
+ status = "disabled";
+ };
+
crypto@2f000 {
compatible = "brcm,spum-nsp-crypto";
reg = <0x2f000 0x900>;
@@ -326,22 +342,6 @@
status = "disabled";
};
- ehci0: usb@2a000 {
- compatible = "generic-ehci";
- reg = <0x2a000 0x100>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- dma-coherent;
- status = "disabled";
- };
-
- ohci0: usb@2b000 {
- compatible = "generic-ohci";
- reg = <0x2b000 0x100>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- dma-coherent;
- status = "disabled";
- };
-
rng: rng@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;