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| author | Arnd Bergmann <arnd@arndb.de> | 2016-04-26 10:02:03 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2016-04-26 12:34:05 +0200 |
| commit | 20bef320366f13b81a21c198dd33c14084ee6cc3 (patch) | |
| tree | b871ecbf41adfc38efb39fbba6285ea0db3c44c2 /arch/arm/boot/dts/r8a7791.dtsi | |
| parent | d81e72c521d46ca43c1afd2e2577d5a09279196f (diff) | |
| parent | c531fb27e9699eaee478ee5686a3cca5dee73602 (diff) | |
Merge tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC Fixes for v4.6
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
This is a backmerge of v4.6 fixes, to avoid a merge conflict between 4.6
and our next/dt branch.
* tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
Diffstat (limited to 'arch/arm/boot/dts/r8a7791.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 6d4a0b6e4df9..565c270e549d 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1079,8 +1079,7 @@ pcie_bus_clk: pcie_bus { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <100000000>; - status = "disabled"; + clock-frequency = <0>; }; /* External SCIF clock */ @@ -1089,7 +1088,6 @@ #clock-cells = <0>; /* This value must be overridden by the board. */ clock-frequency = <0>; - status = "disabled"; }; /* External USB clock - can be overridden by the board */ @@ -1105,7 +1103,6 @@ #clock-cells = <0>; /* This value must be overridden by the board. */ clock-frequency = <0>; - status = "disabled"; }; /* Special CPG clocks */ |