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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2018-11-23 20:53:07 +0100
committerKevin Hilman <khilman@baylibre.com>2018-12-04 16:48:12 -0800
commite8c276d953d800adced2c6174310320f90c5d432 (patch)
tree3e00edc3afcfb5ed816ed5b5d85296f8e834ea1c /arch/arm/boot/dts/meson.dtsi
parent2ad4cff71e31ee5ade26da31c1b8375e9d01e67c (diff)
ARM: dts: meson: group the Cortex-A5 / Cortex-A9 peripherals
The public Meson8b (S805) datasheet describes a memory region called "A9 Periph base" which starts at 0xC4300000 and ends at 0xC430FFFF. Add a simple-bus node and move all peripherals that are part of this memory region. This makes the .dts a bit easier to read. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/meson.dtsi')
-rw-r--r--arch/arm/boot/dts/meson.dtsi24
1 files changed, 16 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index 0839da07a75c..e4645f612712 100644
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -59,14 +59,6 @@
cache-level = <2>;
};
- gic: interrupt-controller@c4301000 {
- compatible = "arm,cortex-a9-gic";
- reg = <0xc4301000 0x1000>,
- <0xc4300100 0x0100>;
- interrupt-controller;
- #interrupt-cells = <3>;
- };
-
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -207,6 +199,22 @@
};
};
+ periph: bus@c4300000 {
+ compatible = "simple-bus";
+ reg = <0xc4300000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xc4300000 0x10000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,cortex-a9-gic";
+ reg = <0x1000 0x1000>,
+ <0x100 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+ };
+
aobus: aobus@c8100000 {
compatible = "simple-bus";
reg = <0xc8100000 0x100000>;