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authorJakub Kicinski <kuba@kernel.org>2024-01-05 07:58:21 -0800
committerJakub Kicinski <kuba@kernel.org>2024-01-05 07:58:21 -0800
commitaa537fee6188583f938282b3b49324e11bc21485 (patch)
treeabb6c5cff16e3a0013bd697ca5dd148fd2fd86a5 /Documentation
parent82e7b22f647202ecd8f25de2bd3f1276bbd34989 (diff)
parentf035dca34ede00d667a3e2d16e1c731161eeacec (diff)
Merge branch 'dpll-expose-fractional-frequency-offset-value-to-user'
Jiri Pirko says: ==================== dpll: expose fractional frequency offset value to user Allow to expose pin fractional frequency offset value over new DPLL generic netlink attribute. Add an op to get the value from the driver. Implement this new op in mlx5 driver. ==================== Link: https://lore.kernel.org/r/20240103132838.1501801-1-jiri@resnulli.us Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/netlink/specs/dpll.yaml11
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml
index cf8abe1c0550..b14aed18065f 100644
--- a/Documentation/netlink/specs/dpll.yaml
+++ b/Documentation/netlink/specs/dpll.yaml
@@ -296,6 +296,16 @@ attribute-sets:
-
name: phase-offset
type: s64
+ -
+ name: fractional-frequency-offset
+ type: sint
+ doc: |
+ The FFO (Fractional Frequency Offset) between the RX and TX
+ symbol rate on the media associated with the pin:
+ (rx_frequency-tx_frequency)/rx_frequency
+ Value is in PPM (parts per million).
+ This may be implemented for example for pin of type
+ PIN_TYPE_SYNCE_ETH_PORT.
-
name: pin-parent-device
subset-of: pin
@@ -460,6 +470,7 @@ operations:
- phase-adjust-min
- phase-adjust-max
- phase-adjust
+ - fractional-frequency-offset
dump:
pre: dpll-lock-dumpit